M306N5FCTFP#U0 Renesas Electronics America, M306N5FCTFP#U0 Datasheet - Page 106

IC M16C/6N MCU FLASH 128K 100QFP

M306N5FCTFP#U0

Manufacturer Part Number
M306N5FCTFP#U0
Description
IC M16C/6N MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N5FCTFP#U0

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
Figure 10.11 Registers IFSR0 and IFSR1
NOTES:
Interrupt Request Cause Select Register 1
NOTES:
Interrupt Request Cause Select Register 0
b7
1
b7
Apr 14, 2006
1.Timer B3 and UART0 bus collision detection share the vector and interrupt control register.
2.Timer B4 and UART1 bus collision detection share the vector and interrupt control register.
1.When setting this bit to 1 (both edges), make sure the POL bit in the INT0IC to INT5IC register is set
2.During memory expansion and microprocessor modes, when the data bus is 16-bit width (BYTE pin is
3.When setting this bit to 0 (SI/O3), make sure the IFSR00 bit in the IFSR0 register is set to 1 (SI/O3).
b6
b6
When using the timer B3 interrupt, set the IFSR06 bit to 0 (timer B3).
When using UART0 bus collision detection, set the IFSR06 bit to 1 (UART0 bus collision detection).
When using the timer B4 interrupt, set the IFSR07 bit to 0 (timer B4).
When using UART1 bus collision detection, set the IFSR07 bit to 1 (UART1 bus collision detection).
to 0 (falling edge).
"L"), set this bit to 0 (SI/O3).
And, make sure the POL bit in the S3IC register is set to 0 (falling edge).
b5
b5
b4
b4
b3
b3
page 84 of 372
b2
b2
0
b1
b1
b0
1
b0
Bit Symbol
Bit Symbol
IFSR10
IFSR11
IFSR12
IFSR13
IFSR14
IFSR15
IFSR16
IFSR17
IFSR00
IFSR01
IFSR02
IFSR06
IFSR07
(b5-b3)
-
Symbol
Symbol
IFSR0
IFSR1
Interrupt request source
select bit
Interrupt request source
select bit
Interrupt request source
select bit
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined.
Interrupt request source
select bit
Interrupt request source
select bit
INT0 interrupt polarity
switching bit
INT1 interrupt polarity
switching bit
INT2 interrupt polarity
switching bit
INT3 interrupt polarity
switching bit
INT4 interrupt polarity
switching bit
INT5 interrupt polarity
switching bit
Interrupt request source
select bit
Interrupt request source
select bit
(1)
(2)
(2)
Bit Name
Bit Name
Address
Address
01DEh
01DFh
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : SI/O3
1 : INT4
0 : Do not set a value
1 : INT5
0 : Do not set a value
1 : SI/O3
0 : A/D conversion
1 : Key input
0 : CAN0 wake-up or error
1 : Do not set a value
0 : Timer B3
1 : UART0 bus collision detection
0 : Timer B4
1 : UART1 bus collision detection
00XXX000h
After Reset
After Reset
00h
(3)
Function
Function
(1)
(1)
(1)
(1)
(1)
(1)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
10. Interrupts

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