M306N5FCTFP#U0 Renesas Electronics America, M306N5FCTFP#U0 Datasheet - Page 402

• Manufacturer Part Number: M306N5FCTFP#U0
• Description: IC M16C/6N MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N5FCTFP#U0

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.10 Jun. 24, 2005
2.30 Oct. 24, 2005
Rev.
Date
REVISION HISTORY
27 to 29 5. Reset: Layout is changed.
Page
281
282
7, 8
29
39
46
52
53
54
55
58
59
62
65
81
84
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1
4
9
Table 22.5 Electrical Characteristics (2): Mask ROM (5th item)
Table 22.6 A/D Conversion Characteristics: “Tolerance Level Impedance” is deleted.
Revised edition issued
* Electric Characteristics of Normal-ver. is added.
* Revised parts and revised contents are as follows (except for expressional change).
1.1 Applications: Comment of Normal-ver. is added.
Table 1.2 Product List: NOTE 1 is added.
Tables 1.3 and 1.4 Pin Characteristics (1)(2) are added.
Table 1.5 Pin Description (1)
5.5 Internal Space is added.
7.2.6 RDY Signal: Last sentence is revised.
Table 8.1 Clock Generating Circuit Specifications
Figure 8.8 PLC0 Register
Figure 8.9 Examples of Main Clock Connection Circuit is revised.
Figure 8.10 Examples of Sub Clock Connection Circuit is revised.
8.1.4 PLL Clock
Table 8.2 Example for Setting PLL Clock Frequencies
8.4.1.2 PLL Operation Mode
8.4.1.6 On-chip Oscillator Mode: Last sentence (When the operation mode is ...) is added.
8.4.1.7 On-chip Oscillator Low Power Dissipation Mode: Last sentence (When the
Table 8.6 Interrupts to Stop Mode and Use Conditions is added.
Figure 8.13 State Transition in Normal Operation Mode: NOTE 7 is deleted.
10.5.8 Returning from an Interrupt Routine: Last sentence (Register bank ...) is added.
10.5.9 Interrupt Priority: First sentence (If two or more...) is revised.
10.5.10 Interrupt Priority Resolution Circuit: First sentence (The interrupt priority level ...)
Figure 10.11 IFSR1 Register (upper): NOTE 2 is revised.
• “f(XCIN)” is changed to “(f(BCLK)).
• 3.0 to 3.6 V (Normal-ver.) is added to Description of Power supply input.
• Clock Frequency in PLL Frequency Synthesizer: 24 MHz
• NOTE 1 is added.
• PLC02 to PLC00 bits: Function of 011b is revised.
• NOTE 4 is added.
• 9th line: The sentence (When the PLL ... to) is added.
• 12th line: 24 MHz and NOTE 1 is added to PLL clock frequency.
• NOTE 1 is added.
• 24 MHz is added to PLL clock.
• 24 MHz is added to NOTE 1.
• NOTES 2 and 3 are added.
• 1st line: The main clock multiplied by “6” and NOTE 1 is added.
operation mode is ...) is deleted.
is revised.
M16C/6N Group (M16C/6N5) Hardware Manual
C-8
Description
Summary
(1)
is added.