M306N5FCTFP#U0 Renesas Electronics America, M306N5FCTFP#U0 Datasheet - Page 398

• Manufacturer Part Number: M306N5FCTFP#U0
• Description: IC M16C/6N MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N5FCTFP#U0

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.00 Nov. 10, 2004
Rev.
Date
REVISION HISTORY
135, 136 Figures 15.1 to 15.3 UART0 to 2 Block Diagram are revised.
Page
132
134
137
139
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156
157
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171
174
176
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200
201
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211
212
213
214
215
219
Figure 14.9 Triangular Wave Modulation Operation is revised.
15.1 UARTi: "UART0, UART1" in Special mode 3 is deleted.
Figure 15.4 UARTi Transmit/Receive Unit is revised.
Figure 15.6 (lower) U0C0 to U2C0 Registers: NOTES 3, 4 are revised.
Figure 15.7 (upper) U0C1, U1C1 Registers
Figure 15.7 (lower) U2C1 Register: NOTE 1 is added.
15.1.1.1 Counter Measure for Communication Error Occurs is added.
15.1.1.4 Continuous Receive Mode: first to 4th lines are added.
15.1.1.7 CTS/RTS Function is added.
Table 15.5 UART Mode Specifications: NOTE 3 is added.
Table 15.7 I/O Pin Functions
15.1.2.1 Bit Rates and Table 15.9 Example of Bit Rates and Settings are added.
15.1.2.2 Counter Measure for Communication Error Occurs is added.
15.1.2.6 CTS/RTS Function is added.
Table 15.15 Registers to Be Used and Settings in Special Mode 2
Table 15.16 Registers to Be Used and Settings in IE Mode
Table 15.17 SIM Mode Specifications: NOTE 3 is added.
Figure 15.39 Polarity of Transfer Clock is revised.
16.2.4 External Operation Amplifier (Op-Amp) Connection Mode: 6th line
16.2.6 Output Impedance of Sensor under A/D Conversion is added.
Figure 17.2 (lower) DA0 and DA1 Registers: The value of After Reset are revised.
Figure 19.4 Bit Mapping of Mask Registers in Byte Access: NOTES 1, 2 are added.
Figure 19.5 Bit Mapping of Mask Registers in Word Access: NOTES 1, 2 are added.
Figure 19.6 C0MCTLj Register: NOTE 2 is revised.
Figure 19.7 C0CTLR Register (upper)
Figure 19.7 C0CTLR Register (lower): NOTES 3, 4 are added.
Figure 19.8 C1CTLR Register: NOTE 1 is revised.
Figure 19.9 C0STR Register (upper): NOTE 2 is added.
19.5 Operational Modes
• The value of After Reset is revised.
• (b5-b4) is revised from "When read, their contents are "0" " to "When read, their
• NOTE 1 is added.
• Method of Selection in TXDi: "Output dummy data" is revised to "Output "H" ".
• "U2LCH" in UiC1 register is revised to "UiLCH".
• "UiRRM" in UiC1 register is revised to "U2RRM".
• "Note that the ANEX0 and ANEX1 pins cannot be directly connected to each other."
• NOTE 1 (Rev.1.00) is deleted and NOTES 1, 2, 3 are added.
• 1st line: "three operational modes" is revised to "four operational modes".
• 5th line: "CAN Interface Sleep Mode" is added.
contents are indeterminate".
is deleted.
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M16C/6N Group (M16C/6N5) Hardware Manual
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Description
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