M306N5FCTFP#U0 Renesas Electronics America, M306N5FCTFP#U0 Datasheet - Page 107

• Manufacturer Part Number: M306N5FCTFP#U0
• Description: IC M16C/6N MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N5FCTFP#U0

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
10.7 NMI Interrupt
10.8 Key Input Interrupt
Figure 10.12 Key Input Interrupt Block Diagram
10.9 CAN0 Wake-up Interrupt
Figure 10.13 CAN0 Wake-up Interrupt Block Diagram
An NMI interrupt request is generated when input on the NMI pin changes state from high to low. The NMI
interrupt is a non-maskable interrupt.
The input level of this NMI interrupt input pin can be read by accessing the P8_5 bit in the P8 register.
This pin cannot be used as an input port.
Of P10_4 to P10_7, a key input interrupt request is generated when input on any of pins P10_4 to P10_7
which has had bits PD10_4 to PD10_7 in the PD10 register set to 0 (input) goes low. Key input interrupts
can be used as a key-on wake up function, the function which gets the MCU out of wait or stop mode.
However, if you intend to use the key input interrupt, do not use P10_4 to P10_7 as analog input ports.
Figure 10.12 shows the Key Input Interrupt Block Diagram. Note, however, that while input on any pin which
has had bits PD10_4 to PD10_7 set to 0 (input mode) is pulled low, inputs on all other pins of the port are
not detected as interrupts.
CAN0 wake-up interrupt request is generated when a falling edge is input to CRX0. The CAN0 wake-up
interrupt is enabled only when the PortEn bit = 1 (CTX/CRX function) and Sleep bit = 1 (sleep mode
enabled) in the C0CTLR register. Figure 10.13 shows the CAN0 Wake-up Interrupt Block Diagram. Please
note that the wake-up message will be lost.
_______
______
Apr 14, 2006
Pull-up
transistor
Sleep bit in C0CTLR register
KI3
KI2
KI1
KI0
Pull-up
transistor
Pull-up
transistor
Pull-up
transistor
PortEn bit in C0CTLR register
page 85 of 372
_______
CRX0
PD10_6 bit in
PD10 register
PD10_4 bit in
PD10 register
PD10_5 bit in
PD10 register
PD10_7 bit in PD10 register
PU25 bit in PUR2 register
PD10_7 bit in PD10 register
C01WKIC register
Interrupt control
_______
circuit
Interrupt control circuit
KUPIC register
CAN0 wake-up
interrupt request
Key input interrupt
request
10. Interrupts
______