M3087BFKGP#U3 Renesas Electronics America, M3087BFKGP#U3 Datasheet - Page 123
![IC M32C/87B MCU FLASH 144LQFP](/photos/12/31/123119/m3087bfkgp_u3_sml.jpg)
M3087BFKGP#U3
Manufacturer Part Number
M3087BFKGP#U3
Description
IC M32C/87B MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M3087BFKGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 99 of 587
Figure 9.14
(1) Initial setting
(2) Before entering wait mode
(3) After exiting wait mode
NOTES:
1. Set each level to meet the formula shown as below.
2. Insert at least 4 NOP's after WAIT instruction.
I flag = 0
FLG register: set IPL
Bits RLVL2 to RLVL0 = the same level as IPL
Select the operating mode from the following:
-main clock mode
-low-speed mode
-on-chip oscillator mode
-on-chip oscillator low-power consumption mode
I flag = 1
RLVL register: bits RLVL2 to RLVL0 = 7
RLVL register: bits RLVL2 to RLVL0 = 7
Set the interrupt priority level (ILVL2 to ILVL0) of
(ILVL2 to ILVL0) > IPL = (RLVL2 to RLVL0)
Set the interrupt priority level of the interrupts,
Set an interrupt priority level of each interrupt
which are not used to exit wait mode, to 0
Execute the WAIT instruction
the interrupt used to exit wait mode
Procedure to Enter Wait Mode
Wait mode
Start
End
(Note 2)
Initial setting for the wait/stop mode
exit interrupt priority level
Interrupt disabled
Set the processor interrupt priority level (IPL)
Set the exit interrupt priority level (RLVL2 to RLVL0)
When the CM02 bit in the CM0 register is 1,
set bits MCD4 to MCD0 in the MCD register
for the CPU frequency to be 10 MHz or lower.
Interrupt enabled
Set the exit priority level as soon as exiting wait mode
9. Clock Generation Circuits
(NOTE 1)
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