M3087BFKGP#U3 Renesas Electronics America, M3087BFKGP#U3 Datasheet - Page 8
![IC M32C/87B MCU FLASH 144LQFP](/photos/12/31/123119/m3087bfkgp_u3_sml.jpg)
M3087BFKGP#U3
Manufacturer Part Number
M3087BFKGP#U3
Description
IC M32C/87B MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M3087BFKGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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- Download datasheet (16Mb)
3.
The symbols and terms used in register diagrams are described below.
*1
*2
*3
*4
XXX Register
b7
• Reserved bit
• Unimplemented
• Do not set to a value
• Function varies according to the operating mode.
Blank: Set to 0 or 1 according to the application.
0: Set to 0.
1: Set to 1.
X: Unimplemented.
RW: Read and write.
RO: Read only.
WO: Write only.
−: Unimplemented.
b6
Register Notation
b5
Reserved bit. Set to specified value.
Nothing is implemented to the bit. As the bit may be used for future functions, if necessary, set to 0.
Operation is not guaranteed when a value is set.
The function of the bit varies with the peripheral function mode. Refer to the register diagram for information
on the individual modes.
b4
0
b3
b2
b1
b0
Bit Symbol
XXX4
XXX5
XXX6
XXX7
XXX0
XXX1
(b2)
(b3)
Symbol
XXX
*1
XXX bits
Unimplemented.
Write 0. Read as undefined value.
Reserved bit
XXX bits
XXX bit
Bit Name
Address
XXX
1 0: XXX
0 1: XXX
1 0: Do not set to this value
1 1: XXX
Set to 0
Function varies depending on each operation
mode
0: XXX
1: XXX
b1 b0
After Reset
00h
Function
RW
RW
RW
RW
RW
WO
RW
RO
*3
*4
*2
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