M3087BFKGP#U3 Renesas Electronics America, M3087BFKGP#U3 Datasheet - Page 251
![IC M32C/87B MCU FLASH 144LQFP](/photos/12/31/123119/m3087bfkgp_u3_sml.jpg)
M3087BFKGP#U3
Manufacturer Part Number
M3087BFKGP#U3
Description
IC M32C/87B MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M3087BFKGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 227 of 587
Figure 17.11
Transmit/receive operation starts by writing data to the UiTB register.
Read the UiRB register when a receive operation is completed.
i = 0 to 4
NOTES:
When an internal clock is used
1. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15).
2. The UiRRM bit can be set to 1 (continuous receive mode enabled), only when the CKDIR bit in the UiMR register is set to 1
I flag = 0
UiMR register: bits SMD2 to SMD0 = 001b
UiSMR register = 00h
UiSMR2 register = 00h
UiSMR3 register = 00h
UiSMR4 register = 00h
UiC0 register: bits CLK1 and CLK0
UiBRG register = m
UiC1 register: TE bit = 0
SiTIC register: bits ILVL2 to ILVL0
SiRIC register: bits ILVL2 to ILVL0
I flag = 1
UiC1 register: TE bit = 1
(external clock) and RTS function is disabled.
Pin settings in the Function Select Registers
Register Settings in Clock Synchronous Mode
CRS bit
CRD bit
NCH bit
CKPOL bit
UFORM bit
RE bit = 0
UiIRS bit
UiRRM bit
UiLCH bit
Bit 7 = 0
RE bit = 1
CKDIR bit
bits 7 to 4 = 0000b
IR bit = 0
IR bit= 0
Start initial setting
End initial setting
Interrupt disabled
Clock synchronous mode
Clock select bit
UiBRG register count source select bits
CTS function select bit
CTS function disable bit
Data output select bit
CLK polarity select bit
Bit order select bit
m = 00h to FFh
Transmit operation disabled
Receive operation disabled
UARTi transmit interrupt source select bit
Continuous receive mode enable bit
Data logic select bit
Transmit interrupt priority level select bit
Interrupt not requested
Receive interrupt priority level select bit
Interrupt not requested
Interrupt enabled
Transmit operation enabled
Receive operation enabled
Baud rate =
17. Serial Interfaces (UART0 to UART4)
2(m + 1)
fj
(2)
fj: f1, f8, f2n
(1)
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