AT90PWM316-16MU Atmel, AT90PWM316-16MU Datasheet - Page 177

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AT90PWM316-16MU

Manufacturer Part Number
AT90PWM316-16MU
Description
MCU AVR 16K FLASH 16MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet

Specifications of AT90PWM316-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-QFN
Processor Series
AT90PWMx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Cpu Family
90P
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
1KB
# I/os (max)
53
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
QFN EP
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOICATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
Price
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7710E–AVR–08/10
When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is overridden
according to
Functions” on page
Table 17-1.
Note:
The following code examples show how to initialize the SPI as a Master and how to perform a
simple transmission.
DDR_SPI in the examples must be replaced by the actual Data Direction Register controlling the
SPI pins. DD_MOSI, DD_MISO and DD_SCK must be replaced by the actual data direction bits
for these pins. E.g. if MOSI is placed on pin PB2, replace DD_MOSI with DDB2 and DDR_SPI
with DDRB.
MOSI
MISO
SCK
Pin
SS
1. See
direction of the user defined SPI pins.
Table
SPI Pin Overrides
“Alternate Functions of Port B” on page 67
Direction, Master SPI
User Defined
Input
User Defined
User Defined
17-1. For more details on automatic port overrides, refer to
65.
(1)
for a detailed description of how to define the
Direction, Slave SPI
Input
User Defined
Input
Input
AT90PWM216/316
“Alternate Port
177

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