AT90PWM316-16MU Atmel, AT90PWM316-16MU Datasheet - Page 305

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AT90PWM316-16MU

Manufacturer Part Number
AT90PWM316-16MU
Description
MCU AVR 16K FLASH 16MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet

Specifications of AT90PWM316-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-QFN
Processor Series
AT90PWMx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Cpu Family
90P
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
1KB
# I/os (max)
53
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
QFN EP
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOICATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM316-16MU
Manufacturer:
SEAGATE
Quantity:
264
Part Number:
AT90PWM316-16MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT90PWM316-16MUR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
26.6
7710E–AVR–08/10
SPI Timing Characteristics
See
Table 26-4.
Note:
Figure 26-3. SPI Interface Timing Requirements (Master Mode)
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Figure 26-3
In SPI Programming mode the minimum SCK high/low period is:
- 2 t
- 3 t
(Data Output)
(Data Input)
(CPOL = 0)
(CPOL = 1)
CLCL
CLCL
SS high to tri-state
SCK to out high
SCK high/low
SCK to SS high
SS low to SCK
Rise/Fall time
Rise/Fall time
SCK high/low
SS low to out
SPI Timing Parameters
Description
MISO
MOSI
SCK period
SCK period
Out to SCK
SCK to out
SCK to out
for f
for f
SCK
SCK
and
SS
Setup
Setup
Hold
Hold
CK
CK
Figure 26-4
< 12 MHz
>12 MHz
(1)
6
4
MSB
5
for details.
MSB
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
7
4 • t
2 • t
2 • t
Min.
10
t
20
ck
...
ck
ck
ck
...
AT90PWM216/316
See
50% duty cycle
0.5 • t
Table 17-4
Typ.
3.6
10
10
15
10
10
15
10
2
sck
LSB
1
LSB
2
Max.
1.6
3
8
ns
305

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