AT90PWM316-16MU Atmel, AT90PWM316-16MU Datasheet - Page 215

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AT90PWM316-16MU

Manufacturer Part Number
AT90PWM316-16MU
Description
MCU AVR 16K FLASH 16MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet

Specifications of AT90PWM316-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-QFN
Processor Series
AT90PWMx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Cpu Family
90P
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
1KB
# I/os (max)
53
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
QFN EP
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOICATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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19.3.3.1
19.3.3.2
7710E–AVR–08/10
Manchester frame
Manchester decoder
Encoder Clock
Manchester Data
Binary Data
Figure 19-2. Manchester Bi-phase levels
The USART supports Manchester encoded frames with the following characteristics:
Figure 19-3. Manchester Frame example
When configured in Manchester mode, the EUSART receiver is able to receive serial frame
using a 17-bit shift register, an edge detector and several data/control registers. The Manchester
decoder receives a frame from the RxD pin of the EUSART interface and loads the received
data in the EUSART data register (UDR and EUDR).
The bit order of the data bits in the frame is configurable to handle MSB or LSB first.
The polarity of the bi-phase start is not configurable. The start bit a logical ‘1’ (rising edge at bit
center).
The polarity of the stop bits is not configurable, the interface allows to read the 2 stops bits value
by software.
The Manchester decoder is enable when the EUSART is configured in Manchester mode and
the RXEN of USCRB set (global USART receive enable).
• One start bit Manchester encoded (logical ‘1’)
• 5, 6, 7, 8, 9, 13, 14,15,16,17 data bits in transmission or reception (MSB or LSB first)
• The number of data bit in a frame is independently configurable in reception and transmission
• One or Two stop bits (level encoded)
mode.
Start
Bit
1 0 0 1 1 1 1 0 1 0 0 1 0 1 0 1 0
Logical 0
(up to 17 data bit)
Data Bits
Logical 1
AT90PWM216/316
Stop
Bits
215

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