AT90USB162-16AU Atmel, AT90USB162-16AU Datasheet - Page 100

• Manufacturer Part Number: AT90USB162-16AU
• Description: MCU AVR USB 16K FLASH 32-TQFP
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB162-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, PS/2, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Processor Series: AT90USBx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/USART/debugWIRE
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATSTK526, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
• Minimum Operating Temperature: - 40 C
• No. Of I/o's: 22
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: SPI, USART
• Rohs Compliant: Yes
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK526 - KIT STARTER FOR AT90USB82/162ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.8
14.8.1
100
8-bit Timer/Counter Register Description
AT90USB82/162
Timer/Counter Control Register A – TCCR0A
Figure 14-9. Timer/Counter Timing Diagram, with Prescaler (f
Figure 14-10
mode and PWM mode, where OCR0A is TOP.
Figure 14-10. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (f
Figure 14-11
PWM mode where OCR0A is TOP.
Figure 14-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
Bit
Read/Write
TCNTn
TCNTn
TCNTn
(clk
(clk
(clk
OCRnx
OCRnx
TOVn
OCFnx
(CTC)
OCFnx
clk
clk
clk
clk
clk
clk
I/O
I/O
I/O
I/O
I/O
I/O
Tn
Tn
Tn
/8)
/8)
/8)
shows the setting of OCF0B in all modes and OCF0A in all modes except CTC
shows the setting of OCF0A and the clearing of TCNT0 in CTC mode and fast
7
COM0A1
R/W
caler (f
clk_I/O
6
COM0A0
R/W
OCRnx - 1
MAX - 1
TOP - 1
/8)
R/W
5
COM0B1
4
COM0B0
R/W
OCRnx
MAX
TOP
OCRnx Value
3
–
R
TOP
2
–
R
OCRnx + 1
BOTTOM
BOTTOM
clk_I/O
/8)
1
WGM01
R/W
0
WGM00
R/W
BOTTOM + 1
BOTTOM + 1
OCRnx + 2
clk_I/O
7707F–AVR–11/10
/8)
TCCR0A