AT90USB162-16AU Atmel, AT90USB162-16AU Datasheet - Page 199

MCU AVR USB 16K FLASH 32-TQFP

AT90USB162-16AU

Manufacturer Part Number
AT90USB162-16AU
Description
MCU AVR USB 16K FLASH 32-TQFP
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet

Specifications of AT90USB162-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, PS/2, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
AT90USBx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI/USART/debugWIRE
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATSTK526, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
No. Of I/o's
22
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
SPI, USART
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK526 - KIT STARTER FOR AT90USB82/162ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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20.8
20.9
7707F–AVR–11/10
Suspend, Wake-up and Resume
Detach
ADDEN is cleared by hardware:
When this bit is cleared, the default device address 00h is used.
After a period of 3 ms during which the USB line was inactive (J state), the controller setn the
SUSPI flag and triggers the corresponding interrupt if enabled. The firmware may then set the
FRZCLK bit.
The CPU can also, depending on software architecture, disable the PLL and/or enter in the idle
mode to reduce the power consumption (especially in a bus powered application).
There are two ways to recover from the “Suspend” mode:
There are no relationship between the SUSPI interrupt and the WAKEUPI interrupt: the WAKE-
UPI interrupt is triggered as soon as there are non-idle patterns on the data lines. Thus, the
WAKEUPI interrupt can occurs even if the controller is not in the “suspend” mode.
When the WAKEUPI interrupt is triggered, if the SUSPI interrupt bit was already set, it is cleared
by hardware.
When the SUSPI interrupt is triggered, if the WAKEUPI interrupt bit was already set, it is cleared
by hardware.
The reset value of the DETACH bit is 1.
It is possible to re-enumerate a device, simply by setting and clearing the DETACH bit (the line
discharge time must be taken in account).
Figure 20-3. Detach a device in Full-speed:
• after a power-up reset,
• when an USB reset is received,
• or when the macro is disabled (USBE cleared)
• First one is to clear the FRZCLK bit. This is possible if the CPU is not in the Idle mode.
• Second way, if the CPU is “idle”, is to enable the WAKEUPI interrupt (WAKEUPE set). Then,
• When the USB device controller is in full-speed mode, setting DETACH will disconnect the
as soon as an non-idle signal is seen by the controller, the WAKEUPI interrupt is triggered.
The firmware shall then clear the FRZCLK bit to restart the transfer.
pull-up on the D+ . Then, clearing DETACH will connect the pull-up on the D+.
UVREF
EN=1
D +
D -
Detach, then
Attach
UVREF
AT90USB82/162
EN=1
D +
D -
199

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