PIC18F8310-E/PT Microchip Technology, PIC18F8310-E/PT Datasheet - Page 263
PIC18F8310-E/PT
Manufacturer Part Number
PIC18F8310-E/PT
Description
IC PIC MCU FLASH 8KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F6310-IPT.pdf
(412 pages)
2.PIC18F6310-IPT.pdf
(16 pages)
3.PIC18F6310-IPT.pdf
(4 pages)
4.PIC18F6310-IPT.pdf
(28 pages)
5.PIC18F6310-IPT.pdf
(6 pages)
6.PIC18F6310-IPT.pdf
(4 pages)
Specifications of PIC18F8310-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8310-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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20.6
Figure 20-4
after the GO bit has been set and the ACQT<2:0> bits
are cleared. A conversion is started after the following
instruction to allow entry into Sleep mode before the
conversion begins.
Figure 20-5
after the GO/DONE bit has been set and the
ACQT<2:0> bits are set to ‘010’, and selecting a 4 T
acquisition time before the conversion starts.
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
FIGURE 20-4:
FIGURE 20-5:
2010 Microchip Technology Inc.
(Holding capacitor continues
acquiring input)
Set GO/DONE bit
1
conversion
A/D Conversions
T
T
CY
Set GO/DONE bit
ACQT
Acquisition
Holding capacitor is disconnected from analog input (typically 100 ns)
Automatic
shows the operation of the A/D Converter
shows the operation of the A/D Converter
2
- T
Time
AD
Cycles
Conversion starts
T
3
AD
sample.
A/D CONVERSION T
A/D CONVERSION T
1 T
4
AD
b9
2 T
(Holding capacitor is disconnected)
Conversion starts
1
This
AD
b8
3 T
b9
2
AD
means
b7
4 T
PIC18F6310/6410/8310/8410
On the following cycle:
ADRESH:ADRESL are loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
b8
3
AD
AD
AD
b6
5 T
CYCLES (ACQT<2:0> = 000, T
CYCLES (ACQT<2:0> = 010, T
On the following cycle:
ADRESH:ADRESL are loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
the
AD
b7
4
AD
b5
6 T
T
5
b6
AD
AD
b4
After the A/D conversion is completed or aborted, a
2 T
started. After this wait, acquisition on the selected
channel is automatically started.
20.7
The discharge phase is used to initialize the value of
the capacitor array. The array is discharged before
every sample. This feature helps to optimize the
unity-gain amplifier as the circuit always needs to
charge
charge/discharge based on previous measure values.
7 T
Cycles
Note:
b5
AD
6
AD
b3
wait is required before the next acquisition can be
8
Discharge
b4
T
7
the
AD
b2
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
9 T
b3
8
AD
capacitor
b1
10
ACQ
T
b2
9
AD
ACQ
b0
11
= 0)
= 4 T
10
T
b1
array,
AD
Discharge
1
AD
DS39635C-page 263
b0
11
)
rather
T
Discharge
AD
1
than
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