PIC18LF1330-I/SO Microchip Technology, PIC18LF1330-I/SO Datasheet - Page 174
![IC PIC MCU FLASH 4KX16 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC18LF1330-I/SO
Manufacturer Part Number
PIC18LF1330-I/SO
Description
IC PIC MCU FLASH 4KX16 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1230-ISO.pdf
(6 pages)
4.PIC18F1230-ISO.pdf
(12 pages)
5.PIC18F1230-ISO.pdf
(4 pages)
6.PIC18F1230-IP.pdf
(312 pages)
Specifications of PIC18LF1330-I/SO
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
256Byte
Cpu Speed
40MHz
No.
RoHS Compliant
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF1330-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1230-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- PIC18F1230-IP PDF datasheet #6
- Current page: 174 of 312
- Download datasheet (6Mb)
PIC18F1230/1330
TABLE 15-2:
DS39758C-page 172
INTCON
PIR1
PIE1
IPR1
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
PORTA
TRISA
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for A/D conversion.
Note 1:
Name
2:
PORTA<7:6> and their direction bits are individually configured as port pins based on various primary
oscillator modes. When disabled, these bits read as ‘0’.
The RA5 bit is only available when Master Clear Reset is disabled (MCLRE Configuration bit = 0);
otherwise, RA5 reads as ‘0’. This bit is read-only.
A/D Result Register High Byte
TRISA7
GIE/GIEH PEIE/GIEL TMR0IE
A/D Result Register Low Byte
SEVTEN
RA7
ADFM
Bit 7
—
—
—
—
REGISTERS ASSOCIATED WITH A/D OPERATION
(1)
(1)
TRISA6
RA6
ADIE
ADIP
ADIF
Bit 6
—
—
—
(1)
(1)
PORTA Data Direction Control Register
ACQT2
RA5
RCIE
RCIP
RCIF
Bit 5
—
—
(2)
Advance Information
VCFG0
ACQT1
INT0IE
TXIE
TXIP
Bit 4
TXIF
RA4
—
CMP2IF
CMP2IE
CMP2IP
PCFG3
ACQT0
CHS1
RBIE
Bit 3
RA3
CMP1IE
CMP1IP
TMR0IF
CMP1IF
PCFG2
ADCS2
CHS0
Bit 2
RA2
GO/DONE
CMP0IE
CMP0IP
CMP0IF
PCFG1
ADCS1
INT0IF
Bit 1
© 2007 Microchip Technology Inc.
RA1
TMR1IF
TMR1IE
TMR1IP
PCFG0
ADCS0
ADON
RBIF
Bit 0
RA0
on Page:
Values
Reset
41
43
43
43
42
42
42
42
42
44
43
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