PIC18LF1330-I/SO Microchip Technology, PIC18LF1330-I/SO Datasheet - Page 84
![IC PIC MCU FLASH 4KX16 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC18LF1330-I/SO
Manufacturer Part Number
PIC18LF1330-I/SO
Description
IC PIC MCU FLASH 4KX16 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1230-ISO.pdf
(6 pages)
4.PIC18F1230-ISO.pdf
(12 pages)
5.PIC18F1230-ISO.pdf
(4 pages)
6.PIC18F1230-IP.pdf
(312 pages)
Specifications of PIC18LF1330-I/SO
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
256Byte
Cpu Speed
40MHz
No.
RoHS Compliant
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF1330-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1230-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- PIC18F1230-IP PDF datasheet #6
- Current page: 84 of 312
- Download datasheet (6Mb)
PIC18F1230/1330
TABLE 9-1:
DS39758C-page 82
RA0/AN0/INT0/
KBI0/CMP0
RA1/AN1/INT1/
KBI1
RA2/TX/CK
RA3/RX/DT
RA4/T0CKI/AN2/
V
MCLR/V
FLTA
RA6/OSC2/CLKO/
T1OSO/T1CKI/AN3
RA7/OSC1/CLKI/
T1OSI/FLTA
Legend:
Note 1:
REF
+
2:
Pin
PP
/RA5/
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Placement of FLTA depends on the value of Configuration bit, FLTAMX, of CONFIG3H.
Placement of T1OSI and T1OSO/T1CKI depends on the value of Configuration bit, T1OSCMX, of CONFIG3H.
PORTA I/O SUMMARY
T1OSO
Function
T1CKI
T1OSI
FLTA
FLTA
CMP0
T0CKI
V
MCLR
OSC2
CLKO
OSC1
INT0
KBI0
INT1
KBI1
CLKI
RA0
AN0
RA1
AN1
RA2
RA3
RA4
AN2
RA5
RA6
AN3
RA7
V
REF
TX
CK
RX
DT
PP
(1)
(1)
+
(2)
(2)
(2)
Setting
TRIS
0
1
1
1
1
1
0
1
1
1
1
0
1
0
0
1
0
1
1
0
1
0
1
1
1
1
1
1
1
1
0
1
0
0
0
1
1
0
1
1
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
0
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Advance Information
Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
TTL
DIG
TTL
TTL
DIG
TTL
DIG
DIG
DIG
TTL
DIG
TTL
DIG
DIG
DIG
TTL
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
LATA<0> data output; not affected by analog input.
PORTA<0> data input; disabled when analog input enabled.
Analog input 0.
External interrupt 0.
Interrupt-on-change pin.
Comparator 0 input.
LATA<1> data output; not affected by analog input.
PORTA<1> data input; disabled when analog input enabled.
Analog input 1.
External interrupt 1.
Interrupt-on-change pin.
LATA<2> data output; not affected by analog input. Disabled when
CV
PORTA<2> data input. Disabled when analog functions enabled;
disabled when CV
EUSART asynchronous transmit.
EUSART synchronous clock.
LATA<3> data output; not affected by analog input.
PORTA<3> data input; disabled when analog input enabled.
EUSART asynchronous receive.
EUSART synchronous data.
LATA<4> data output.
PORTA<4> data input; default configuration on POR.
Timer0 external clock input.
Analog input 2.
A/D reference voltage (high) input.
Master Clear (Reset) input. This pin is an active-low Reset to the device.
Programming voltage input.
Digital input.
Fault detect input for PWM.
LATA<6> data output. Enabled in RCIO, INTIO2 and ECIO modes only.
PORTA<6> data input. Enabled in RCIO, INTIO2 and ECIO modes only.
Oscillator crystal output or external clock source output.
Oscillator crystal output.
Timer1 oscillator output.
Timer1 clock input.
Analog input 3.
LATA<7> data output. Disabled in external oscillator modes.
PORTA<7> data input. Disabled in external oscillator modes.
Oscillator crystal input or external clock source input.
External clock source input.
Timer1 oscillator input.
Fault detect input for PWM.
REF
output enabled.
REF
output enabled.
Description
© 2007 Microchip Technology Inc.
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