PIC18LF1330-I/SO Microchip Technology, PIC18LF1330-I/SO Datasheet - Page 182
![IC PIC MCU FLASH 4KX16 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC18LF1330-I/SO
Manufacturer Part Number
PIC18LF1330-I/SO
Description
IC PIC MCU FLASH 4KX16 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1230-ISO.pdf
(6 pages)
4.PIC18F1230-ISO.pdf
(12 pages)
5.PIC18F1230-ISO.pdf
(4 pages)
6.PIC18F1230-IP.pdf
(312 pages)
Specifications of PIC18LF1330-I/SO
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
256Byte
Cpu Speed
40MHz
No.
RoHS Compliant
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF1330-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1230-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- PIC18F1230-IP PDF datasheet #6
- Current page: 182 of 312
- Download datasheet (6Mb)
PIC18F1230/1330
The module is enabled by setting the LVDEN bit. Each
time that the LVD module is enabled, the circuitry
requires some time to stabilize. The IRVST bit is a
read-only bit and is used to indicate when the circuit is
stable. The module can only generate an interrupt after
the circuit is stable and IRVST is set.
18.1
When the LVD module is enabled, a comparator uses
an internally generated reference voltage as the set
point. The set point is compared with the trip point,
where each node in the resistor divider represents a
FIGURE 18-1:
DS39758C-page 180
Operation
LVD MODULE BLOCK DIAGRAM
BORENx
LVDEN
V
DD
Advance Information
LVDL3:LVDL0
Internal Voltage
trip point voltage. The “trip point” voltage is the voltage
level at which the device detects a low-voltage event
depending on the configuration of the module. When
the supply voltage is equal to the trip point, the voltage
tapped off of the resistor array is equal to the internal
reference voltage generated by the voltage reference
module. The comparator then generates an interrupt
signal by setting the LVDIF bit.
The trip point voltage is software programmable to any 1 of
15 values. The trip point is selected by programming the
LVDL3:LVDL0 bits (LVDCON<3:0>).
Reference
LVDEN
LVDCON
Register
© 2007 Microchip Technology Inc.
LVDIF
Set
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