PIC18LF1330-I/SO Microchip Technology, PIC18LF1330-I/SO Datasheet - Page 65
![IC PIC MCU FLASH 4KX16 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC18LF1330-I/SO
Manufacturer Part Number
PIC18LF1330-I/SO
Description
IC PIC MCU FLASH 4KX16 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1230-ISO.pdf
(6 pages)
4.PIC18F1230-ISO.pdf
(12 pages)
5.PIC18F1230-ISO.pdf
(4 pages)
6.PIC18F1230-IP.pdf
(312 pages)
Specifications of PIC18LF1330-I/SO
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
256Byte
Cpu Speed
40MHz
No.
RoHS Compliant
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF1330-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1230-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- PIC18F1230-IP PDF datasheet #6
- Current page: 65 of 312
- Download datasheet (6Mb)
5.5.3
The use of Indexed Literal Offset Addressing mode
effectively changes how the first 96 locations of Access
RAM (00h to 5Fh) are mapped. Rather than containing
just the contents of the bottom half of Bank 0, this mode
maps the contents from Bank 0 and a user-defined
“window” that can be located anywhere in the data
memory space. The value of FSR2 establishes the
lower boundary of the addresses mapped into the
window, while the upper boundary is defined by FSR2
plus 95 (5Fh). Addresses in the Access RAM above
5Fh are mapped as previously described (see
Section 5.3.2 “Access Bank”). An example of Access
Bank remapping in this addressing mode is shown in
Figure 5-9.
FIGURE 5-9:
© 2007 Microchip Technology Inc.
Example Situation:
Locations in the region
from the FSR2 Pointer
(090h) to the pointer plus
05Fh (0EFh) are mapped
to
Access RAM (000h-05Fh).
Locations in Bank 0 from
060h to 07Fh are mapped,
as usual, to the middle of
the Access Bank.
Special Function Regis-
ters at F80h through FFFh
are
through FFh, as usual.
Bank 0 addresses below
5Fh can still be addressed
by using the BSR.
ADDWF f, d, a
FSR2H:FSR2L = 090h
the
mapped
MAPPING THE ACCESS BANK IN
INDEXED LITERAL OFFSET
ADDRESSING MODE
bottom
to
of
REMAPPING THE ACCESS BANK WITH INDEXED LITERAL OFFSET
ADDRESSING MODE
80h
the
0EFh
FFFh
05Fh
07Fh
F00h
F80h
000h
090h
100h
Data Memory
Bank 14
Bank 15
through
Window
Bank 0
Bank 1
Bank 0
Advance Information
SFRs
Remapping of the Access Bank applies only to
operations using the Indexed Literal Offset Addressing
mode. Operations that use the BSR (Access RAM bit is
‘1’) will continue to use Direct Addressing as before.
5.6
Enabling the extended instruction set adds eight
additional commands to the existing PIC18 instruction
set. These instructions are executed as described in
Section 21.2 “Extended Instruction Set”.
PIC18 Instruction Execution and
the Extended Instruction Set
PIC18F1230/1330
Bank 0 “Window”
Access Bank
Bank 0
SFRs
DS39758C-page 63
00h
5Fh
7Fh
80h
FFh
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