PIC18F2431-I/SO Microchip Technology, PIC18F2431-I/SO Datasheet - Page 167

IC PIC MCU FLASH 8KX16 28SOIC

PIC18F2431-I/SO

Manufacturer Part Number
PIC18F2431-I/SO
Description
IC PIC MCU FLASH 8KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2431-I/SO

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/I2C/SPI/SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5-ch x 10-bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3-DB18F4431 - BOARD DAUGHTER ICEPIC3
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2431-I/SO
Manufacturer:
MICROCHIP
Quantity:
2 000
Part Number:
PIC18F2431-I/SO
Manufacturer:
NXP/恩智浦
Quantity:
20 000
16.1.2
The Period Measurement mode is selected by setting
CAPxM3:CAPxM0 = 0101. In this mode, the value of
Timer5 is latched into the CAPxBUF register on the ris-
ing edge of the input capture trigger and Timer5 is sub-
sequently reset to 0000h (optional by setting
CAPxREN = 1) on the next T
relationship in Figure 16-4).
16.1.3
The Pulse Width Measurement mode can be config-
ured for two different edge sequences, such that the
pulse width is based on either the falling to rising edge
FIGURE 16-5:
 2003 Microchip Technology Inc.
Note 1: TMR5 is a synchronous time base input to the Input Capture, prescaler = 1:1. It increments on every Q1 rising edge.
TMR5
CAP1 pin
CAP1BUF
TMR5 reset
Instruction
Execution
2: IC1 is configured in Pulse Width Measurement mode (CAP1M3:CAP1M0 = 0111, rising to falling pulse width measure-
3: TMR5 value is latched by CAP1BUF on T
4: TMR5 Reset is normally an asynchronous Reset signal to TMR5. When used in Pulse Width Measurement mode, it is
5: TMR5 Reset pulse is activated on the capture edge. CAP1REN bit has no bearing in this mode.
(1)
PERIOD MEASUREMENT MODE
PULSE WIDTH MEASUREMENT
MODE
(2)
(2)
ment). No noise filter on CAP1 input is used. MOVWF instruction loads CAP1CON when W = 0111.
ture event, the write will always take precedence. All input capture buffers, CAP1BUF, CAP2BUF and CAP3BUF, are
updated with the incremented value of the time base on the next T
(see Note 4 when Reset occurs).
always present on the edge that first initiates the pulse width measurement (i.e., when configured in the rising to falling
Pulse Width Measurement mode, it is active on each rising edge detected. In the falling to rising Pulse Width Measure-
ment mode, it is active on each falling edge detected.
(3)
(4,5)
MOVWF CAP1CON
PULSE WIDTH MEASUREMENT MODE TIMING
Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3 Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3 Q4 Q1Q2Q3Q4
0012
CY
(see capture and reset
0013
0014
PIC18F2331/2431/4331/4431
CY
Preliminary
0015
rising edge. In the event that a write to TMR5 coincides with an input cap-
0015
0000
of the CAPx input pin (CAPxM3:CAPxM0 = 0110), or
on the rising to falling edge (CAPxM3:CAPxM0 =
0111).
Timer5 is always reset on the edge when the
measurement is first initiated. For example, when the
measurement is based on the falling to rising edge,
Timer5 is first reset on the falling edge and the timer
value is captured on the rising edge thereafter. Upon
entry into the Pulse Width Measurement mode, the
very first edge detected on the CAPx pin is always
captured. The TMR5 value is reset on the first active
edge (see Figure 16-5).
CY
0001
clock edge when the capture event takes place
0002
0001
0000
0001
DS39616B-page 165
0002
0002

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