PIC18F2431-I/SO Microchip Technology, PIC18F2431-I/SO Datasheet - Page 168

• Manufacturer Part Number: PIC18F2431-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2431-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/I2C/SPI/SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3-DB18F4431 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2331/2431/4331/4431
16.1.3.1
Pulse width measurement accuracy can be only
ensured when the pulse width high and low present on
CAPx input exceeds one T
limitations depend on the mode selected:
• When CAPxM3:CAPxM0 = 0110 (rising-to-falling
• When CAPxM3:CAPxM0 = 0111 (falling-to-rising
FIGURE 16-6:
DS39616B-page 166
edge delay), the CAPx input high pulse width
(TccH) must exceed T
edge delay), the CAPx input low pulse width
(TccL) must exceed T
Note 1: The Period Measurement mode will
Note 1: TMR5 can be selected as the time base for input capture. Time base can be optionally reset when the capture reset
CAP1
CAP2
CAP3
Time Base
CAP1BUF
CAP2BUF
CAP3BUF
Time Base Reset
2: The Pulse Width Measurement mode will
2: Detailed CAPxBUF event timing (all modes reflect same capture and Reset timing) is shown in Figure 16-4.There are
produce valid results upon sampling of
the second rising edge of the input
capture. CAPxBUF values latched during
the first active edge after initialization are
invalid.
latch the value of the timer upon sampling
of the first input signal edge by the input
capture.
enabled bit is set (CAPXREN = 1).
six commutation BLDC hall-effect sensor states shown. The other two remaining states (i.e., 000h and 111h) are
invalid in the normal operation. They are still to be decoded by the CPU firmware in BLDC motor application.
Pulse Width Measurement Timing
(2)
(2)
(2)
(1)
0FFFh
0000h
INPUT CAPTURE ON STATE CHANGE (HALL-EFFECT SENSOR MODE)
(1)
CY
CY
+ 10 ns.
+ 10 ns.
CY
clock cycle. The
1
0
1
1
0
0
1
0
1
Preliminary
0
1
0
0
1
1
16.1.4
When CAPxM3:CAPxM0 = 1000, the value is captured
on every signal change on the CAPx input. If all three
capture channels are configured in this mode, the
three-input-capture can be used as the Hall-effect
sensor state transition detector. The value of Timer5
can be captured, Timer5 reset and the interrupt
generated. Any change on CAP1, CAP2 or CAP3 is
detected and the associated time base count is
captured.
For position and velocity measurement in this mode,
the timer can be optionally reset (see Section 16.1.6
“Timer5 Reset” for Reset options).
0
1
0
INPUT CAPTURE ON STATE
CHANGE
 2003 Microchip Technology Inc.