AT89C51RE2-SLRUM Atmel, AT89C51RE2-SLRUM Datasheet - Page 55

• Manufacturer Part Number: AT89C51RE2-SLRUM
• Description: MCU 8051 128K FLASH 44-PLCC
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RE2-SLRUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89OCD-01
• For Use With: AT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

7663E–8051–10/08
The communication link detection is done by a circular polling on all the interfaces. On
AT89C51RE2, the ISP interfaces are all based on simple UART mechanisms (Rx, Tx).
The Rx line default state is ‘1’ when no communication is in progress. A transition from ‘1’ to ‘0’
on the Rx line indicates a start of frame.
Once one of the interface detects a starts of frame (‘0’) on its Rx line, the interface is selected
and configuration of the communication link starts.
Figure 20. Communication link Detection
Notes:
1. SF: Start of Frame (‘0’ = detected; ‘1’ = not detected)
2. In AT89C51RE2 implementation, Interface 1 refers to UART0 and Interface 2 refers to the
OCD UART interface.
Interface 1
Interface 2
Detection
No
No
SF = 0
SF = 0
Start
Yes
Yes
Initialisation
Interface 2
Start Bootloader
Initialisation
Interface 1
AT89C51RE2
55