PIC18F4580-I/P Microchip Technology, PIC18F4580-I/P Datasheet - Page 307

• Manufacturer Part Number: PIC18F4580-I/P
• Description: IC PIC MCU FLASH 16KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4580-I/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 23-45: RXFCONn: RECEIVE FILTER CONTROL REGISTER n [0 ≤ n ≤ 1]
REGISTER 23-46: SDFLC: STANDARD DATA BYTES FILTER LENGTH COUNT REGISTER
© 2007 Microchip Technology Inc.
RXFCON0
RXFCON1
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
Note 1:
Note:
U-0
—
This register is available in Mode 1 and 2 only.
This register is available in Mode 1 and 2 only.
Register 23-46 through Register 23-51 are writable in Configuration mode only.
bit 7
RXFnEN: Receive Filter n Enable bits
0 = Filter is disabled
1 = Filter is enabled
RXF15EN
RXF7EN
R/W-0
R/W-0
Unimplemented: Read as ‘0’
FLC4:FLC0: Filter Length Count bits
Mode 0:
Not used; forced to ‘00000’.
00000-10010 = 0
If DLC3:DLC0 = 0000 No bits will be compared with incoming data bits.
If DLC3:DLC0 = 0001 Up to 8 data bits of RXFnEID<7:0>, as determined by FLC2:FLC0, will be
If DLC3:DLC0 = 0010 Up to 16 data bits of RXFnEID<15:0>, as determined by FLC3:FLC0, will be
If DLC3:DLC0 = 0011 Up to 18 data bits of RXFnEID<17:0>, as determined by FLC4:FLC0, will be
U-0
—
RXF14EN
RXF6EN
R/W-0
R/W-0
W = Writable bit
‘1’ = Bit is set
U-0
—
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
18 bits are available for standard data byte filter. Actual number of bits used
depends on DLC3:DLC0 bits (RXBnDLC<3:0> or BnDLC<3:0> if configured
as RX buffer) of message being received.
compared with the corresponding number of data bits of the incoming
message.
compared with the corresponding number of data bits of the incoming
message.
compared with the corresponding number of data bits of the incoming
message.
RXF13EN
RXF5EN
R/W-1
R/W-0
PIC18F2480/2580/4480/4580
R/W-0
FLC4
Preliminary
RXF12EN RXF11EN
RXF4EN
R/W-1
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
FLC3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RXF3EN
R/W-1
R/W-0
R/W-0
FLC2
RXF10EN
RXF2EN
R/W-1
R/W-0
x = Bit is unknown
x = Bit is unknown
R/W-0
FLC1
RXF1EN
RXF9EN
R/W-1
R/W-0
(1)
DS39637C-page 305
RXF0EN
RXF8EN
(1)
R/W-0
R/W-1
R/W-0
FLC0
bit 0
bit 0