ATSAM3U2EA-AU Atmel, ATSAM3U2EA-AU Datasheet - Page 51
![IC MCU 32BIT 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
ATSAM3U2EA-AU
Manufacturer Part Number
ATSAM3U2EA-AU
Description
IC MCU 32BIT 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2EA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Controller Family/series
SAM3U
No. Of I/o's
96
Ram Memory Size
36KB
Cpu Speed
96MHz
No. Of Timers
3
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 51 of 1171
- Download datasheet (25Mb)
12.7
6430D–ATARM–25-Mar-11
Pulse Width Modulation Controller (PWM)
• Each channel is user-configurable and contains:
• Two global registers that act on all three TC Channels
• 4 channels, one 16-bit counter per channel
• Common clock generator, providing Thirteen Different Clocks
• Independent channel programming
• Synchronous Channel mode
• Connection to one PDC channel
• Two independent event lines which can send up to 8 triggers on ADC within a period
• Four programmable Fault Inputs providing asynchronous protection of outputs
– Pulse Generation
– Delay Timing
– Pulse Width Modulation
– Up/Down Capabilities
– Quadrature Decoder Logic
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
– A Modulo n counter providing eleven clocks
– Two independent Linear Dividers working on modulo n counter outputs
– High Frequency Asynchronous clocking mode
– Independent Enable Disable Commands
– Independent Clock Selection
– Independent Period and Duty Cycle, with Double Buffering
– Programmable selection of the output waveform polarity
– Programmable center or left aligned output waveform
– Independent Output Override for each channel
– Independent complementary Outputs with 12-bit dead time generator for each
– Independent Enable Disable Commands
– Independent Clock Selection
– Independent Period and Duty Cycle, with Double Buffering
– Synchronous Channels share the same counter
– Mode to update the synchronous channels registers after a programmable number
– Offers Buffer transfer without Processor Intervention, to update duty cycle of
channel
of periods
synchronous channels
SAM3U Series
51
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