ATSAM3U2EA-AU Atmel, ATSAM3U2EA-AU Datasheet - Page 789

• Manufacturer Part Number: ATSAM3U2EA-AU
• Description: IC MCU 32BIT 128KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U2EA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b, 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Controller Family/series: SAM3U
• No. Of I/o's: 96
• Ram Memory Size: 36KB
• Cpu Speed: 96MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 36 KB
• Interface Type: 4xUSART, 2xTWI, 5xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

• CPCDIS: Counter Clock Disable with RC Compare
0 = counter clock is not disabled when counter reaches RC.
1 = counter clock is disabled when counter reaches RC.
• EEVTEDG: External Event Edge Selection
• EEVT: External Event Selection
Signal selected as external event.
Note:
• ENETRG: External Event Trigger Enable
0 = the external event has no effect on the counter and its clock. In this case, the selected external event only controls the
TIOA output.
1 = the external event resets the counter and starts the counter clock.
• WAVSEL: Waveform Selection
• WAVE
0 = Waveform Mode is disabled (Capture Mode is enabled).
1 = Waveform Mode is enabled.
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
Value
Value
Value
0
1
2
3
0
1
2
3
0
1
2
3
1. If TIOB is chosen as the external event signal, it is configured as an input and no longer generates waveforms and subse-
quently no IRQs.
Name
NONE
RISING
FALLING
EDGE
Name
TIOB
XC0
XC1
XC2
Name
UP
UPDOWN
UP_RC
UPDOWN_RC
Description
None
Rising edge
Falling edge
Each edge
Description
TIOB
XC0
XC1
XC2
Description
UP mode without automatic trigger on RC Compare
UPDOWN mode without automatic trigger on RC Compare
UP mode with automatic trigger on RC Compare
UPDOWN mode with automatic trigger on RC Compare
(1)
TIOB Direction
input
output
output
output
SAM3U Series
SAM3U Series
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