ATSAM3U2EA-AU Atmel, ATSAM3U2EA-AU Datasheet - Page 94
![IC MCU 32BIT 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
ATSAM3U2EA-AU
Manufacturer Part Number
ATSAM3U2EA-AU
Description
IC MCU 32BIT 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2EA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Controller Family/series
SAM3U
No. Of I/o's
96
Ram Memory Size
36KB
Cpu Speed
96MHz
No. Of Timers
3
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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13.9
94
Intrinsic functions
SAM3U Series
Table 13-13. Cortex-M3 instructions (Continued)
ANSI cannot directly access some Cortex-M3 instructions. This section describes intrinsic func-
tions that can generate these instructions, provided by the CMIS and that might be provided by a
C compiler. If a C compiler does not support an appropriate intrinsic function, you might have to
use inline assembler to access some instructions.
The CMSIS provides the following intrinsic functions to generate instructions that ANSI cannot
directly access:
Table 13-14. CMSIS intrinsic functions to generate some Cortex-M3 instructions
Mnemonic
TEQ
TST
UBFX
UDIV
UMLAL
UMULL
USAT
UXTB
UXTH
WFE
WFI
Instruction
CPSIE I
CPSID I
CPSIE F
CPSID F
ISB
DSB
DMB
REV
REV16
REVSH
RBIT
SEV
WFE
WFI
Operands
Rn, Op2
Rn, Op2
Rd, Rn, #lsb, #width
{Rd,} Rn, Rm
RdLo, RdHi, Rn, Rm
RdLo, RdHi, Rn, Rm
Rd, #n, Rm {,shift #s}
{Rd,} Rm {,ROR #n}
{Rd,} Rm {,ROR #n}
-
-
CMSIS intrinsic function
void __enable_irq(void)
void __disable_irq(void)
void __enable_fault_irq(void)
void __disable_fault_irq(void)
void __ISB(void)
void __DSB(void)
void __DMB(void)
uint32_t __REV(uint32_t int value)
uint32_t __REV16(uint32_t int value)
uint32_t __REVSH(uint32_t int value)
uint32_t __RBIT(uint32_t int value)
void __SEV(void)
void __WFE(void)
void __WFI(void)
Brief description
Test Equivalence
Test
Unsigned Bit Field Extract
Unsigned Divide
Unsigned Multiply with Accumulate
(32 x 32 + 64), 64-bit result
Unsigned Multiply (32 x 32), 64-bit
result
Unsigned Saturate
Zero extend a byte
Zero extend a halfword
Wait For Event
Wait For Interrupt
Flags
-
-
-
-
Q
-
-
-
-
N,Z,C
N,Z,C
6430D–ATARM–25-Mar-11
Page
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page 165
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