ATSAM3U4EA-CU Atmel, ATSAM3U4EA-CU Datasheet - Page 1058

IC MCU 32BIT 256KB FLSH 144LFBGA

ATSAM3U4EA-CU

Manufacturer Part Number
ATSAM3U4EA-CU
Description
IC MCU 32BIT 256KB FLSH 144LFBGA
Manufacturer
Atmel
Series
SAM3Ur
Datasheets

Specifications of ATSAM3U4EA-CU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
52 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, AT91SAM3U-EK, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3U4EA-CU
Manufacturer:
Atmel
Quantity:
10 000
41.5.5
1058
SAM3U Series
Input Gain and Offset
Table 41-4.
Table 41-5.
The ADC12B has a built in Programmable Gain Amplifier (PGA) and Programmable Offset.
The Programmable Gain Amplifier can be set to gains of 1/2, 1, 2 and 4. The Programmable
Gain Amplifier can be used either for single ended applications or for fully differential
applications.
The gain is configurable through the GAIN bit as shown in
Table 41-6.
To allow full range, analog offset of the ADC12B can be configured by the OFFSET bit. The Off-
set can only be changed in single ended mode. In fully differential mode the offset is always set
to Vrefin/2.
Table 41-7.
Input Pins
AD12B0
AD12B1
AD12B2
AD12B3
AD12B4
AD12B5
AD12B6
AD12B7
Input Pins
AD12B0-AD12B1
AD12B2-AD12B3
AD12B4-AD125B
AD12B6-AD12B7
OFFSET Bit
GAIN<0:1>
00
01
10
11
0
1
Input Pins and Channel Number in Single Ended Mode
Input Pins and Channel Number In Differential Mode
Gain of the Sample and Hold Unit: GAIN Bits and DIFF Bit.
Offset of the Sample and Hold Unit: OFFSET DIFF and Gain (G)
OFFSET (DIFF = 0)
GAIN (DIFF = 0)
Vrefin/2G
Vrefin/2
1
1
2
4
Channel Number
CH0
CH2
CH4
CH6
Channel Number
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
Table
41-6.
OFFSET (DIFF = 1)
GAIN (DIFF = 1)
Vrefin/2
0.5
6430D–ATARM–25-Mar-11
1
2
2

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