AT91SAM9XE512-CU Atmel, AT91SAM9XE512-CU Datasheet - Page 636

• Manufacturer Part Number: AT91SAM9XE512-CU
• Description: MCU ARM9 512K FLASH 217-BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE512-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 180 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 96
• Interface Type: EBI/Ethernet/SPI/TWI/USART/USB
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 6
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 180 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6254C–ATARM–22-Jan-10
The following flowchart,
the PDC. Polling or interrupt method can be used to wait for the end of write according to the
contents of the Interrupt Mask Register (MCI_IMR).
Figure 37-12. Multiple Write Functional Flow Diagram
Notes:
1. It is assumed that this command has been correctly sent (see
2. This field is also accessible in the MCI Block Register (MCI_BLKR).
AT91SAM9XE128/256/512 Preliminary
(Figure
Configure the PDC channel
MCI_TPR = Data Buffer Address to write
MCI_TCR = BlockLength/4
37-12) shows how to manage a multiple write block transfer with
Send SET_BLOCKLEN command
Send SELECT/DESELECT_CARD
Set the PDCMODE bit
MCI_MR |= PDCMODE
Set the block length (in bytes)
MCI_MR |= (BlockLength << 16) (2)
Set the block count (if necessary)
MCI_BLKR |= (BlockCount << 0)
Send WRITE_MULTIPLE_BLOCK
command (1) to select the card
Send STOP_TRANSMISSION
Read status register MCI_SR
MCI_PTCR = TXTEN
NOTBUSY = 0?
command (1)
command
BLKE = 0?
Poll the bit
Poll the bit
RETURN
No
No
(1)
(1)
Yes
Yes
Figure
37-9).
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