ADUC7128BCPZ126 Analog Devices Inc, ADUC7128BCPZ126 Datasheet - Page 61

• Manufacturer Part Number: ADUC7128BCPZ126
• Description: IC DAS MCU ARM7 ADC/DDS 64-LFCSP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7128BCPZ126

• Core Size: 16/32-Bit
• Program Memory Size: 126KB (126K x 8)
• Core Processor: ARM7
• Speed: 41.78MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: PLA, POR, PWM, PSM, Temp Sensor, WDT
• Number Of I /o: 28
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFCSP
• Controller Family/series: (ARM7) ADUC
• No. Of I/o's: 40
• Ram Memory Size: 8KB
• Cpu Speed: 41.78MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 6
• Package: 64LFCSP EP
• Device Core: ARM7TDMI
• Family Name: ADuC7xxx
• Maximum Speed: 41.78 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 40
• Interface Type: I2C/SPI/UART
• On-chip Adc: 14-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUC7128QSPZ - KIT DEV FOR ADUC7128
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 85. COMxSTA1 MMR Bit Designations
Bit
7
6
5
4
3
2
1
0
Table 86. COMxDIV2 MMR Bit Designations
Bit
15
14:13
12:11
10:0
Network Addressable UART Mode
This mode allows connecting the MicroConverter on a 256-node
serial network, either as a hardware single master or via software
in a multimaster network. Bit 7 of COMxIEN1 (ENAM bit)
must be set to enable UART in network-addressable mode.
Note that there is no parity check in this mode. The parity bit is
used for address.
COM0IEN1
COM0TX = 0xA0;
while(!(0x020==(COM0STA0 & 0x020))){} // wait for adr tx to finish.
COM0IEN1
COM0TX = 0x55;
Name
FBEN
RSVD
FBM[1 to 0]
FBN[10 to 0]
Name
DCD
RI
DSR
CTS
DDCD
TERI
DDSR
DCTS
= 0xE7;
= 0xE6;
Description
Data Carrier Detect.
Ring Indicator.
Data Set Ready.
Clear to Send.
Delta Data Carrier Detect.
Trailing Edge Ring Indicator.
Delta Data Set Ready.
Delta Clear to Send.
Description
Fractional Baud Rate Generator Enable Bit.
Reserved.
M, if FBM = 0, M = 4 (see the Using the Fractional Divider section).
N (see the Using the Fractional Divider section).
Set automatically if DCD changed state since COMxSTA1 last read.
Cleared automatically by reading COMxSTA1.
Set if NRI changed from 0 to 1 since COMxSTA1 last read.
Cleared automatically by reading COMxSTA1.
Set automatically if DSR changed state since COMxSTA1 last read.
Cleared automatically by reading COMxSTA1.
Set automatically if CTS changed state since COMxSTA1 last read.
Cleared automatically by reading COMxSTA1.
Set by user to enable the fractional baud rate generator.
Cleared by user to generate baud rate using the standard 450 UART baud rate generator.
//Setting ENAM, E9BT, E9BR, ETD, NABP
// Slave address is 0xA0
//
// Tx data to slave: 0x55
Rev. 0 | Page 61 of 92
Clear NAB bit to indicate Data is coming
Network Addressable UART Register Definitions
Four additional registers, COMxIEN0, COMxIEN1, COMxIID1,
and COMxADR are used only in network addressable UART
mode.
In network address mode, the least significant bit of the
COMxIEN1 register is the transmitted network address control
bit. If set to 1, the device is transmitting an address. If cleared
to 0, the device is transmitting data. For example, the following
master-based code transmits the slave address followed by the data:
ADuC7128/ADuC7129