EP9307-IRZ Cirrus Logic Inc, EP9307-IRZ Datasheet - Page 301

• Manufacturer Part Number: EP9307-IRZ
• Description: IC ARM9 SOC ARM920T 272TFBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-IRZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 272-TFBGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 14
• Ram Memory Size: 32MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: TFBGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1256

LINEPATTRN
DS785UM1
31
15
Bit Descriptions:
Address:
Default:
Mask:
Definition:
Bit Descriptions:
30
14
29
13
28
12
RSVD:
YINIT:
XINIT:
0x8004_003C - Read/Write
0x000F_FFFF
0x000F_FFFF
RSVD:
CNT:
PATRN:
Line Pattern Register
27
11
26
10
RSVD
Copyright 2007 Cirrus Logic
25
9
Reserved - Unknown during read
Y Initialization - Read/Write
The value in this field specifies a 12 bit binary fraction of a
pixel that provides sub-pixel precision to the algorithm.
The minimum fractional value is 1/4096. This field can also
be initialized to account for truncation errors in the drawing
algorithm.
X Initialization - Read/Write
The value in this field specifies a 12 bit binary fraction of a
pixel that provides sub-pixel precision to the algorithm.
The minimum fractional value is 1/4096. This field can also
be initialized to account for truncation errors in the drawing
algorithm.
Reserved - Unknown during read
The value in this field specifies the pixel position in the
PATRN field that defines the end of the pattern. It is used
as the repeat interval for the pattern counter.
The bit values in this field specify an ‘on’ and ‘off’ pattern
that is to be used during a Line Draw function. The pattern
will repeat based on the CNT value.
A ‘1’ causes a pixel fill from the
24
8
PATRN
23
7
22
6
21
5
20
4
BLOCKMASK
19
3
Graphics Accelerator
EP93xx User’s Guide
18
2
CNT
register.
17
1
16
8-37
0
8