EP9307-IRZ Cirrus Logic Inc, EP9307-IRZ Datasheet - Page 471

• Manufacturer Part Number: EP9307-IRZ
• Description: IC ARM9 SOC ARM920T 272TFBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-IRZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 272-TFBGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 14
• Ram Memory Size: 32MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: TFBGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1256

DS785UM1
RSVD:
LPS:
OCI:
DRWE:
LPSC:
CCIC:
CRWE:
Copyright 2007 Cirrus Logic
Reserved. Unknown During Read.
(READ) LocalPowerStatus. The Root Hub does not
support the local power status feature; thus, this bit is
always read as “0”.
(WRITE) ClearGlobalPower: In global power mode
(PowerSwitchingMode=0), this bit is written to “1” to turn
off power to all ports (clear PortPowerStatus). In per-port
power mode, it clears PortPowerStatus only on ports
whose PortPowerControlMask bit is not set. Writing a “0”
has no effect.
OverCurrentIndicator. This bit reports overcurrent
conditions when the global reporting is implemented.
When set, an overcurrent condition exists. When cleared,
all power operations are normal. If per-port overcurrent
protection is implemented this bit is always “0”
(READ) DeviceRemoteWakeupEnable. This bit enables a
ConnectStatusChange bit as a resume event, causing a
USBSUSPEND to USBRESUME state transition and
setting the ResumeDetected interrupt.
0 = ConnectStatusChange is not a remote wakeup event.
1 = ConnectStatusChange is a remote wakeup event.
(WRITE) SetRemoteWakeupEnable: Writing a '1' sets
DeviceRemoveWakeupEnable. Writing a '0' has no effect.
(READ) LocalPowerStatusChange. The Root Hub does
not support the local power status feature; thus, this bit is
always read as “0”.
(WRITE) SetGlobalPower. In global power mode
(PowerSwitchingMode=0), This bit is written to “1” to turn
on power to all ports (clear PortPowerStatus). In per-port
power mode, it sets PortPowerStatus only on ports whose
PortPowerControlMask bit is not set. Writing a “0” has no
effect.
OverCurrentIndicatorChange. This bit is set by hardware
when a change has occurred to the OCI field of this
register. The HCD clears this bit by writing a “1”. Writing a
“0” has no effect.
(WRITE) ClearRemoteWakeupEnable. Writing a '1' clears
DeviceRemoveWakeupEnable. Writing a '0' has no effect.
Universal Serial Bus Host Controller
EP93xx User’s Guide
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