EP9307-IRZ Cirrus Logic Inc, EP9307-IRZ Datasheet - Page 784

• Manufacturer Part Number: EP9307-IRZ
• Description: IC ARM9 SOC ARM920T 272TFBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-IRZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 272-TFBGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 14
• Ram Memory Size: 32MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: TFBGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1256

27
IDEDataIn
IDEMDMADataOut
27-14
IDE Interface
EP93xx User’s Guide
31
15
31
15
Address:
Default:
Definition:
Bit Descriptions:
Address:
Default:
Definition:
30
14
30
14
29
13
29
13
28
12
28
12
0x800A_0014 - Read Only
0x0000_0000
In PIO mode read operation, this register is the Input Data Registers,
containing the register contents or the data read from the device. The register
is loaded from the DD pins at the positive edge of the DIORn signal. The
register is read only in this operation. In MDMA and UDMA data-in operations,
this register is an exact copy of the data in the input buffer to be transferred
through DMA. The register is read only in these operations. Any write to this
register is ignored.
IDEDD:
0x800A_0018 - Write Only (should be written by the DMA controller only)
0x0000_0000
In MDMA data-out operations, this register contains the data in the output
buffer to be transferred to the device. The data is written into this register by
the DMA controller. This register should only be addressed and written by the
27
27
11
11
26
10
26
10
Copyright 2007 Cirrus Logic
25
25
9
9
IDE input data in PIO read, data in input buffer in MDMA
and data at the head of input buffer in UDMA mode.
24
24
8
8
IDEDD
IDEDD
IDEDD
IDEDD
23
23
7
7
22
22
6
6
21
21
5
5
20
20
4
4
19
19
3
3
18
18
2
2
17
17
1
1
DS785UM1
16
16
0
0