ST7FLITE20F1B6 STMicroelectronics, ST7FLITE20F1B6 Datasheet - Page 38

• Manufacturer Part Number: ST7FLITE20F1B6
• Description: IC MCU 8BIT 8K FLASH 20-DIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE20F1B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: ST7FLITE2x
• Core: ST7
• Data Bus Width: 8 bit
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• For Use With: 497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5517 - EVAL BOARD 1PHASE ENERGY METER497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Function Descriptions
Table 10. SCIx_IT_Enable
38/235
Function Name
Function Prototype
Behaviour Description
Input Parameters
Output Parameter
Required Preconditions
Functions called
Postconditions
See also
SCIx_IT_Enable
Void SCIx_IT_Enable (SCI_IT_Type SCI_IT_Param)
Selects SCI interrupts
SCI_IDLE_LINE
Enable interrupt due to idle frame reception.
SCI_RECEIVE_OVERRUN
Enable interrupt due to data reception or overrun error.
SCI_TRANSMIT_REGISTER_READY
Enable interrupt when transmit data register is ready to
load.
SCI_FRAME_TRANSMITTED
Enable Interrupt due to Transmission completetion.
SCI_PARITY_ERROR
Enable Interrupt due to Parity Error.
None
1. SCIx_ComputeBaudrate or SCIx_SelectBaudrate must
have been called.
2. You should reset the interrupt mask with EnableInter-
rupts.
None
None
None