ST7FDALIF2M6 STMicroelectronics, ST7FDALIF2M6 Datasheet - Page 41

• Manufacturer Part Number: ST7FDALIF2M6
• Description: IC MCU 8BIT 8K 20-SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FDALIF2M6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: DALI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: ST7DALI
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: DALI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7DALI-EVAL, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2131-5

ST7DALIF2
Note:
1
2
3
4
The LVD Reset circuitry generates a reset when V
●
●
The LVD function is illustrated in
The voltage threshold can be configured by option byte to be low, medium or high.
Provided the minimum V
the MCU can only be in two modes:
●
●
In these conditions, secure operation is always ensured for the application without the need
for external reset hardware.
During a Low Voltage Detector Reset, the RESET pin is held low, thus permitting the MCU
to reset other devices.
The LVD allows the device to be used without any external RESET circuitry.
The LVD is an optional function which can be selected by option byte.
Use of LVD with capacitive power supply: with this type of power supply, if power cuts occur
in the application, it is recommended to pull V
conditions. Refer to circuit example in
It is recommended to make sure that the V
device is exiting from Reset, to ensure the application functions properly.
Figure 16. Low voltage detector vs reset
V
V
RESET
IT-
IT+
V
V
Under full software control
In static safe reset
(LVD)
(LVD)
IT+(LVD)
IT-(LVD)
V
DD
when V
when V
DD
DD
is falling
is rising
DD
value (guaranteed for the oscillator frequency) is above V
Figure
Figure 87 on page 150
16.
DD
DD
supply voltage rises monotonously when the
down to 0V to ensure optimum restart
V
DD
hys
Supply, reset and clock management
is below:
and note 4.
IT-(LVD)
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