ST7FDALIF2M6 STMicroelectronics, ST7FDALIF2M6 Datasheet - Page 94

IC MCU 8BIT 8K 20-SOIC

ST7FDALIF2M6

Manufacturer Part Number
ST7FDALIF2M6
Description
IC MCU 8BIT 8K 20-SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FDALIF2M6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
DALI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST7DALI
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
DALI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
4 bit
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7DALI-EVAL, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2131-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FDALIF2M6
Quantity:
4 000
Part Number:
ST7FDALIF2M6TR
Manufacturer:
NEC
Quantity:
670
DALI communication module
16.8
16.9
16.10
94/171
Table 43.
Interrupts
Table 44.
Bi-phase bit detection
The clock used for sampling the DALI signal is programmed by the DCMCLK register. Each
bit phase is sampled 16 times. The bit phase level is determined by two of three sample
clock pulses (pulses 6,7,8). The two phase levels of the bi-phase bit are shifted into the 4-bit
pre-shift register at the 9th sample clock pulse.
Only the second phase level of the bi-phase bit is shifted into the 16-bit shifter.
The 4-bit pre-shifter is used to detect any errors in the received frame.
When a change of phase is detected (edge trigger), the 4-bit sample clock counter (integer
range 0 to15) is cleared.
Low power modes
Active-halt
Interrupt event
Mode
Wait
Halt
EOT
Effect of low power modes on DCM
Interrupt control bits
No effect on DCM
DCM registers are frozen
No effect on DCM
Event
flag
ITF
control
Enable
Description
ITE
bit
from
Wait
Exit
Yes
ST7DALIF2
from
Exit
Halt
No

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