ST7FDALIF2M6 STMicroelectronics, ST7FDALIF2M6 Datasheet - Page 80

• Manufacturer Part Number: ST7FDALIF2M6
• Description: IC MCU 8BIT 8K 20-SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FDALIF2M6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: DALI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: ST7DALI
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: DALI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7DALI-EVAL, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2131-5

12-bit autoreload timer 2 (AT2)
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Bit 1 = OPx PWMx Output Polarity.
This bit is read/write by software and cleared by hardware after a reset. This bit selects the
polarity of the PWM signal.
0: The PWM signal is not inverted.
1: The PWM signal is inverted.
Bit 0 = CMPFx PWMx Compare Flag.
This bit is set by hardware and cleared by software by reading the PWMxCSR register. It
indicates that the upcounter value matches the DCRx register value.
0: Upcounter value does not match DCR value.
1: Upcounter value matches DCR value.
Break control register (BREAKCR)
Read/Write
Reset Value: 0000 0000 (00h)
Bits 7:6 = Reserved. Forced by hardware to 0.
Bit 5 = BA Break Active.
This bit is read/write by software, cleared by hardware after reset and set by hardware when
the BREAK pin is low. It activates/deactivates the Break function.
0: Break not active
1: Break active
Bit 4 = BPEN Break Pin Enable.
This bit is read/write by software and cleared by hardware after Reset.
0: Break pin disabled
1: Break pin enabled
Bits 3:0 = PWM[3:0] Break Pattern.
These bits are read/write by software and cleared by hardware after a reset. They are used
to force the four PWMx output signals into a stable state when the Break function is active.
PWMx duty cycle register high (DCRxH)
Read / Write
Reset Value: 0000 0000 (00h)
15
7
0
0
0
0
BA
0
BPEN
0
DCR11
PWM3
DCR10
PWM2
PWM1
DCR9
ST7DALIF2
PWM0
DCR8
0
8