ST72F621L4M1 STMicroelectronics, ST72F621L4M1 Datasheet - Page 138

IC MCU 8BIT LS 16K 34-SOIC

ST72F621L4M1

Manufacturer Part Number
ST72F621L4M1
Description
IC MCU 8BIT LS 16K 34-SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F621L4M1

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
34-SOIC (7.5mm Width)
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI, USB
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2112-5

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16 REVISION HISTORY
Description of the changes between the current release of the specification and the previous one.
138/139
23-Sep-2005
20-Mar-2006
11-Jun-2009
Date
Revision
3.0
4.0
5
Clarification of Flash read-out protection in
Removed “optional” for V
Added one note in
Added caution to
Changed
Changed
Changed
Changed
Added
Added one row for Injected current on PA0 to PA7 pins in
Changed
Changed figures and tables in
Changed description of FMP_R bit in
Added
Added
Added note in
Changed description of TC bit in
Modified maximum injected current values for PA0-PA6, PA7,
Reference made to the Flash Programming Reference Manual for Flash timing values
tion 12.6.2 on page 107
Updated option list
Added figures and notes for RESET pin protection when LVD is enabled/disabled
Added ECOPACK information in
Modified I
All low voltage devices and characteristics removed
Addition of Rs resistor in
Additional note added below
Note added at end of
Section 12.5.4 Crystal Oscillator Output Drive Level
t
sion
Important notes modified showing device identification
Important note related to A/D converter conversion speed added,
Weak pull-up equivalent resistor values modified,
Graph in
Updated option list
Notes updated for
Figures modified for RESET pin protection when LVD is enabled/disabled
All FASTROM options removed
Updated part numbers on cover page.
Replaced CCR by CC (Condition Code) register when the I bit is concerned.
Added caution note in
Added note 1 below
Removed dynamic latchup in
tivity).
Corrected CPHA value in
page
Updated ECOPACK text in
CONV
119, and in
values modified in
“Noise Error Causes” on page 75
section 15.1 on page 135
section 15.3 on page 136
Figure 72 on page 114
section 10.4.3.3 on page 59
Table 18 on page 64
section 10.5.4.3 on page 71
“SCI Clock Tolerance” on page 74
“EMC CHARACTERISTICS” on page 108
S
value and corresponding note in
section 10.4.2 on page 56
Section 12.11.2 SPI - Serial Peripheral
“External clock and event detector mode” on page 47
Section
“Low Voltage Reset” on page 21
Section 12.2.3 Thermal Characteristics.
section 10.7.6 on page 94
section 6.2 on page
DD
Figure 59. on page 106
section 12.12 on page 120
Figure 79 on page
12.9.1,
Doc ID 6996 Rev 5
section 13 on page
in
Table 4 on page 20
Section 12.7.3 Absolute Maximum Ratings (Electrical Sensi-
Figure 9 on page 15
“PACKAGE MECHANICAL DATA” on page 124
Description of Changes
updated
section 10.5.7 on page 77
section 13 on page 124
Section
section 14.1 on page 128
(noise error section)
12.11.1,
21.
section 4.3.1 on page 14
119. Updated t
section 12.8.1 on page 110
124.
referring to Important notes
section 12.9.1 on page 113
Section
modified
according to Flash/ROM silicon revi-
Interface.
section 12.2.2 on page 102
v(MO)
12.11.2,
section 12.2.2 on page 102
and t
section 15.2 on page 135
Section 12.12.1
H(MO)
page 115
in
Figure 80 on
page 115
sec-

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