MC9S08SL16CTL Freescale Semiconductor, MC9S08SL16CTL Datasheet - Page 259

• Manufacturer Part Number: MC9S08SL16CTL
• Description: MCU 16KB FLASH SLIC 28TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08SL16CTL

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSSOP
• Processor Series: S08SL
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 6
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08EL32, DEMO9S08EL32AUTO
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 28TSSOP
• Family Name: HCS08
• Maximum Speed: 40 MHz
• For Use With: DEMO9S08EL32 - BOARD DEMO FOR 9S08 EL MCUDEMO9S08EL32AUTO - DEMO BOARD EL32 AUTO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
14.2.7
This register is actually two separate registers. Reads return the contents of the read-only receive data
buffer and writes go to the write-only transmit data buffer. Reads and writes of this register are also
involved in the automatic flag clearing mechanisms for the SCI status flags.
14.3
The SCI allows full-duplex, asynchronous, NRZ serial communication among the MCU and remote
devices, including other MCUs. The SCI comprises a baud rate generator, transmitter, and receiver block.
The transmitter and receiver operate independently, although they use the same baud rate generator.
During normal operation, the MCU monitors the status of the SCI, writes the data to be transmitted, and
processes received data. The following describes each of the blocks of the SCI.
14.3.1
As shown in
Freescale Semiconductor
Setting TXINV inverts the TxD output for all cases: data bits, start and stop bits, break, and idle.
Reset
TXINV
Field
ORIE
NEIE
FEIE
PEIE
4
3
2
1
0
W
R
1
Functional Description
SCI Data Register (SCIxD)
Baud Rate Generation
Transmit Data Inversion — Setting this bit reverses the polarity of the transmitted data output.
0 Transmit data not inverted
1 Transmit data inverted
Overrun Interrupt Enable — This bit enables the overrun flag (OR) to generate hardware interrupt requests.
0 OR interrupts disabled (use polling).
1 Hardware interrupt requested when OR = 1.
Noise Error Interrupt Enable — This bit enables the noise flag (NF) to generate hardware interrupt requests.
0 NF interrupts disabled (use polling).
1 Hardware interrupt requested when NF = 1.
Framing Error Interrupt Enable — This bit enables the framing error flag (FE) to generate hardware interrupt
requests.
0 FE interrupts disabled (use polling).
1 Hardware interrupt requested when FE = 1.
Parity Error Interrupt Enable — This bit enables the parity error flag (PF) to generate hardware interrupt
requests.
0 PF interrupts disabled (use polling).
1 Hardware interrupt requested when PF = 1.
R7
T7
Figure
0
7
14-12, the clock source for the SCI baud rate generator is the bus-rate clock.
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
R6
T6
0
6
Table 14-7. SCIxC3 Field Descriptions (continued)
Figure 14-11. SCI Data Register (SCIxD)
R5
T5
0
5
R4
T4
0
4
Description
R3
T3
3
0
Serial Communications Interface (S08SCIV4)
R2
T2
2
0
R1
T1
0
1
R0
T0
0
0
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