MC9S08SL16CTL Freescale Semiconductor, MC9S08SL16CTL Datasheet - Page 72

MCU 16KB FLASH SLIC 28TSSOP

MC9S08SL16CTL

Manufacturer Part Number
MC9S08SL16CTL
Description
MCU 16KB FLASH SLIC 28TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08SL16CTL

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSSOP
Processor Series
S08SL
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
22
Number Of Timers
6
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08EL32, DEMO9S08EL32AUTO
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Package
28TSSOP
Family Name
HCS08
Maximum Speed
40 MHz
For Use With
DEMO9S08EL32 - BOARD DEMO FOR 9S08 EL MCUDEMO9S08EL32AUTO - DEMO BOARD EL32 AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08SL16CTL
Manufacturer:
Freescale
Quantity:
2 359
1
Chapter 5 Resets, Interrupts, and General System Control
5.7.2
This high page register contains a single write-only control bit. A serial background command such as
WRITE_BYTE must be used to write to SBDFR. Attempts to write this register from a user program are
ignored. Reads always return 0x00.
72
BDFR is writable only through serial background debug commands, not from user programs.
Reset:
BDFR
Field
Field
ILAD
LVD
3
1
0
W
R
System Background Debug Force Reset Register (SBDFR)
Illegal Address — Reset was caused by an attempt to access either data or an instruction at an unimplemented
memory address.
0 Reset not caused by an illegal address
1 Reset caused by an illegal address
Low Voltage Detect — If the LVDRE bit is set and the supply drops below the LVD trip voltage, an LVD reset will
occur. This bit is also set by POR.
0 Reset not caused by LVD trip or POR.
1 Reset caused by LVD trip or POR.
Background Debug Force Reset — A serial background command such as WRITE_BYTE can be used to allow
an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program.
0
0
7
Figure 5-3. System Background Debug Force Reset Register (SBDFR)
= Unimplemented or Reserved
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
0
0
6
Table 5-4. SBDFR Register Field Descriptions
Table 5-3. SRS Register Field Descriptions
0
0
5
0
0
4
Description
Description
3
0
0
0
0
2
Freescale Semiconductor
0
0
1
BDFR
0
0
0
1

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