S9S12P128J0MFT Freescale Semiconductor, S9S12P128J0MFT Datasheet - Page 47

• Manufacturer Part Number: S9S12P128J0MFT
• Description: MCU 128K FLASH AUTO 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12P128J0MFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Controller Family/series: S12
• No. Of I/o's: 34
• Ram Memory Size: 6KB
• Cpu Speed: 32MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.12
The COP time-out rate bits CR[2:0] and the WCOP bit in the CPMUCOP register at address 0x003C are
loaded from the Flash register FOPT. See
loaded from the Flash configuration field byte at global address 0x3_FF0E during the reset sequence.
1.13
The ATD module includes external trigger inputs ETRIG0 and ETRIG1. The external trigger allows the
user to synchronize ATD conversion to external trigger events.
external trigger inputs.
Consult the ATD section for information about the analog-to-digital converter module. References to
freeze mode are equivalent to active BDM mode.
Freescale Semiconductor
COP Configuration
ATD External Trigger Input Connection
External Trigger
ETRIG0
ETRIG1
Input
FOPT Register
FOPT Register
NV[2:0] in
Table 1-13. Initial COP Rate Configuration
Table 1-15. ATD External Trigger Sources
NV[3] in
Table 1-14. Initial WCOP Configuration
S12P-Family Reference Manual, Rev. 1.13
000
001
010
011
100
101
110
111
1
0
Table 1-13
and
PWM channel 1
PWM channel 3
Connectivity
Table 1-14
COPCTL Register
COPCTL Register
CR[2:0] in
WCOP in
Table 1-15
111
110
101
100
011
010
001
000
0
1
for coding. The FOPT register is
shows the connection of the
Device Overview MC9S12P-Family
47