DF2210CUNP24V Renesas Electronics America, DF2210CUNP24V Datasheet - Page 535

MCU 16BIT FLASH 3V 32K 64-QFN

DF2210CUNP24V

Manufacturer Part Number
DF2210CUNP24V
Description
MCU 16BIT FLASH 3V 32K 64-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of DF2210CUNP24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2210CUNP24V
Manufacturer:
Renesas Electronics America
Quantity:
135
14.3.13 USB Endpoint Data Register 2 (UEDR2)
UEDR2 is a data register for endpoint 2 (for Bulk_out transfer). UEDR2 stores data received from
the host. The number of data items to be read must be the number of bytes specified by UESZ2.
When 1 byte is read from UEDR2, UESZ2 is decremented by1.
UEDR2 is a byte register to which 4-byte address area is assigned. Accordingly, UEDR2 allows
the user to read 2-byte or 4-byte data continuously by word transfer or longword transfer.
14.3.14 USB Endpoint Receive Data Size Register 0o (UESZ0o)
UESZ0o is a receive data size register for endpoint 0 (for Control_out transfer). UESZ0o indicates
the number of bytes of data to be received from the host.
Note that UESZ0o is decremented by 1 every time when 1 byte is read from UEDR0o.
14.3.15 USB Endpoint Receive Data Size Register 2 (UESZ2)
UESZ2 is a receive data size register for endpoint 2 (for Bulk_out transfer). UESZ2 indicates the
number of bytes of data to be received from the host.
Note that UESZ2 is decremented by 1 every time when 1 byte is read from UEDR2.
The FIFO for endpoint 2 (for Bulk_out transfer) has a dual-FIFO configuration. The data size
indicated by this register refers to the currently selected FIFO.
Bit
7 to 0 D7 to D0
Bit
7
6 to 0 D6 to D0
Bit
7
6 to 0 D6 to D0
Bit Name
Bit Name
Bit Name
Initial Value R/W
Initial Value R/W
Initial Value R/W
R
R
R
R
R
Description
These bits store data for Bulk_out transfer
Description
Reserved
These bits indicate the size of data to be received in
Control_out transfer
Description
Reserved
These bits indicate the size of data to be received in
Bulk_out transfer
Rev.7.00 Dec. 24, 2008 Page 479 of 698
REJ09B0074-0700

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