MC908GT16CBE Freescale Semiconductor, MC908GT16CBE Datasheet - Page 242
![IC MCU 16K FLASH 8MHZ SPI 42SDIP](/photos/12/38/123871/mc908gt16cbe_sml.jpg)
MC908GT16CBE
Manufacturer Part Number
MC908GT16CBE
Description
IC MCU 16K FLASH 8MHZ SPI 42SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GT8CFBE.pdf
(292 pages)
Specifications of MC908GT16CBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
36
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Controller Family/series
HC08
No. Of I/o's
34
Ram Memory Size
512Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GT
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
30
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Package
42SPDIP
Family Name
HC08
Maximum Speed
8 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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Development Support
19.2.2.3 SIM Break Status Register
The SIM break status register (SBSR) contains a flag to indicate that a break caused an exit from wait
mode. This register is only used in emulation mode.
SBSW — SIM Break Stop/Wait
19.2.2.4 Break Flag Control Register
The SIM break flag control register (SBFCR) contains a bit that enables software to clear status bits while
the MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
242
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
1 = Status bits clearable during break
0 = Status bits not clearable during break
Address: $FE00
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
$FE03
Figure 19-8. SIM Break Flag Control Register (SBFCR)
BCFE
Bit 7
Bit 7
R
R
R
0
Figure 19-7. SIM Break Status Register (SBSR)
= Reserved
= Reserved
R
R
6
6
R
R
5
5
R
R
4
4
1. Writing a 0 clears SBSW.
R
R
3
3
R
R
2
2
Note
SBSW
R
1
0
1
(1)
Freescale Semiconductor
Bit 0
Bit 0
R
R
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