DF36054FPJV Renesas Electronics America, DF36054FPJV Datasheet - Page 334

MCU 3/5V 32K J-TEMP PB-FREE 64-L

DF36054FPJV

Manufacturer Part Number
DF36054FPJV
Description
MCU 3/5V 32K J-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36054FPJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 15 Controller Area Network for Tiny (TinyCAN)
15.3.2
MCR controls a transition request to halt mode and a software reset request.
Rev. 4.00 Mar. 15, 2006 Page 300 of 556
REJ09B0026-0400
Bit
7 to 2
1
0
Bit Name
HLTRQ
RSTRQ
Master Control Register (MCR)
Initial
Value
All 0
0
1
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0.
Halt Request
Halts communication between the TinyCAN and CAN
bus. Communication with the CAN bus can be resumed
by clearing this bit to 0 and then receiving 11 recessive
bits.
0: TinyCAN in normal mode
1: Halt mode is requested
Reset Request
Controls a software reset of the TinyCAN. After a reset
has been requested and the initial state is entered, both
the RESET bit in GSR and the RHI bit in TCIRR0 are set
to 1. When this bit is cleared to 0, communication with the
CAN bus is resumed. After powering on, this bit and the
RESET bit are always set to 1.
0: TinyCAN in normal mode
1: Software reset of TinyCAN is requested

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