DF36054FPJV Renesas Electronics America, DF36054FPJV Datasheet - Page 74

MCU 3/5V 32K J-TEMP PB-FREE 64-L

DF36054FPJV

Manufacturer Part Number
DF36054FPJV
Description
MCU 3/5V 32K J-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36054FPJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 2 CPU
2.7
There are four CPU states: the reset state, program execution state, program halt state, and
exception-handling state. The program execution state includes active mode and subactive mode.
For the program halt state, there are a sleep mode, standby mode, and sub-sleep mode. These
states are shown in figure 2.11. Figure 2.12 shows the state transitions. For details on program
execution state and program halt state, refer to section 6, Power-Down Modes. For details on
exception processing, refer to section 3, Exception Handling.
Rev. 4.00 Mar. 15, 2006 Page 40 of 556
REJ09B0026-0400
CPU States
CPU state
A state in which some
or all of the chip
functions are stopped
to conserve power
A transient state in which the CPU changes
the processing flow due to a reset or an interrupt
The CPU is initialized
Program halt state
Figure 2.11 CPU Operation States
execution state
handling state
Reset state
Exception-
Program
The CPU executes successive program
instructions at high speed,
synchronized by the system clock
The CPU executes
successive program
instructions at reduced
speed, synchronized
by the subclock
(high speed) mode
Subactive mode
Subsleep mode
Standby mode
Sleep mode
Active
Power-down
modes

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