MC9S12DP512CPVER Freescale Semiconductor, MC9S12DP512CPVER Datasheet - Page 53

• Manufacturer Part Number: MC9S12DP512CPVER
• Description: IC MCU 16BIT 4K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12DP512CPVER

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Package: 112LQFP
• Family Name: HCS12
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 2.5|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/I2C/SCI/SPI
• On-chip Adc: 2(8-chx10-bit)
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC9S12DP512CPVERTR

Pin Name
PAD[06:00]
PAD[14:8]
Funct. 1
VREGEN
RESET
PB[7:0]
EXTAL
PAD15
PAD07
PA[7:0]
BKGD
TEST
XTAL
XFC
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
2.2 Signal Properties Summary
Table 2-1 summarizes the pin functionality.
ADDR[15:8]/
Pin Name
ADDR[7:0]/
DATA[15:8]
AN[14:08]
AN[06:00]
Funct. 2
DATA[7:0]
NOACC
LSTRB
IPIPE1
IPIPE0
TAGHI
ECLK
AN15
AN07
XIRQ
R/W
IRQ
—
—
—
—
—
—
Pin Name
Funct. 3
ETRIG1
ETRIG0
XCLKS
TAGLO
MODC
MODB
MODA
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Pin Name
Funct. 4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Table 2-1 Signal Properties
Pin Name
Funct. 5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VDDPLL
VDDPLL
Supply
Power
VDDR
VDDX
VDDR
VDDR
VDDA
NA
PUPBE
PUPEE
PUPEE
PUPAE
Always
PUCR/
PUCR/
PUCR/
PUCR/
CTRL
None
None
Internal Pull
While RESET
While RESET
Up
Resistor
pin is low:
pin is low:
Down
Down
Disabled
MC9S12DP512 Device Guide V01.25
Reset
State
None
None
Up
Up
Up
Oscillator Pins
External Reset
Test Input
Voltage Regulator Enable Input
PLL Loop Filter
Background Debug, Tag High, Mode
Input
Port AD Input, Analog Input AN7 of
ATD1, External Trigger Input of ATD1
Port AD Inputs, Analog Inputs
AN[6:0] of ATD1
Port AD Input, Analog Input AN7 of
ATD0, External Trigger Input of ATD0
Port AD Inputs, Analog Inputs
AN[6:0] of ATD0
Port A I/O, Multiplexed Address/Data
Port B I/O, Multiplexed Address/Data
Port E I/O, Access, Clock Select
Port E I/O, Pipe Status, Mode Input
Port E I/O, Pipe Status, Mode Input
Port E I/O, Bus Clock Output
Port E I/O, Byte Strobe, Tag Low
Port E I/O, R/W in expanded modes
Port E Input, Maskable Interrupt
Port E Input, Non Maskable Interrupt
Description
53