R4F24569NVFQV Renesas Electronics America, R4F24569NVFQV Datasheet - Page 507

MCU 256KB FLASH 64K 144-LQFP

R4F24569NVFQV

Manufacturer Part Number
R4F24569NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of R4F24569NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24569NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24569NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2456, H8S/2456R, H8S/2454 Group
This LSI includes a data transfer controller (DTC). The DTC can be activated by an interrupt or
software, to transfer data.
Figure 9.1 shows a block diagram of the DTC.
9.1
1. Normal mode
2. Repeat mode
3. Block transfer mode
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
One operation transfers one byte or one word of data.
Memory address is incremented or decremented by 1 or 2.
From 1 to 65,536 transfers can be specified.
One operation transfers one byte or one word of data.
Memory address is incremented or decremented by 1 or 2.
Once the specified number of transfers (1 to 256) has ended, the initial state is restored, and
transfer is repeated.
One operation transfers one block of data.
The block size is 1 to 256 bytes or words.
From 1 to 65,536 transfers can be specified.
Either the transfer source or the transfer destination is designated as a block area.
Transfer possible over any number of channels
Three transfer modes
One activation source can trigger a number of data transfers (chain transfer).
Direct specification of 16-Mbyte address space possible.
Activation by software is possible.
Transfer can be set in byte or word units.
A CPU interrupt can be requested for the interrupt that activated the DTC.
Module stop state can be set.
Features
Section 9 Data Transfer Controller (DTC)
Section 9 Data Transfer Controller (DTC)
Page 477 of 1392

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