R4F24569NVFQV Renesas Electronics America, R4F24569NVFQV Datasheet - Page 713

• Manufacturer Part Number: R4F24569NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24569NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2456, H8S/2456R, H8S/2454 Group
10.17.3 Port J Register (PORTJ)
PORTJ shows the pin states of port J. PORTJ cannot be modified.
Note:
10.17.4 Port J Open Drain Control Register (PJODR)
PJODR specifies the output type of each port J pin.
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Bit
7 to 3
2
1
0
Bit
7 to 2 ⎯
1
0
*
Bit Name
PJ1ODR
PJ0ODR
Bit Name
⎯
PJ2
PJ1
PJ0
Determined by the state of pins PJ0 to PJ2.
Initial Value
Undefined
⎯*
⎯*
⎯*
Initial Value
All 0
0
0
R/W
⎯
R
R
R
R/W
⎯
R/W
R/W
Description
Reserved
If these bits are read, they will return an undefined
value.
The pin state is always read from this register.
If this register is read, the PJDR values are read for
the bits with the corresponding PJDDR bits set to 1.
For the bits with the corresponding PJDDR bits
cleared to 0, the pin states are read.
Description
Reserved
These bits are always read as 0. Only the initial
values should be written to these bits.
Setting a PJODR bit to 1 makes the corresponding
pin an NMOS open-drain output pin, while clearing
a PJODR bit to 0 makes the corresponding pin a
CMOS output pin.
Section 10 I/O Ports
Page 683 of 1392