M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 116

• Manufacturer Part Number: M30290FAHP#U5A
• Description: IC M16C/29 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/29r

Specifications of M30290FAHP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 27x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
10.1 Count Source Protective Mode
e
E
1
. v
J
Figure 10.2 WDC Register and WDTS Register
6
0
In this mode, a on-chip oscillator clock is used for the watchdog timer count source. The watchdog timer
can be kept being clocked even when CPU clock stops as a result of run-away.
Before this mode can be used, the following register settings are required:
(1) Set the PRC1 bit in the PRCR register to 1 (enable writes to PM1 and PM2 registers).
(2) Set the PM12 bit in the PM1 register to 1 (reset when the watchdog timer underflows).
(3) Set the PM22 bit in the PM2 register to 1 (on-chip oscillator clock used for the watchdog timer count source).
(4) Set the PRC1 bit in the PRCR register to 0 (disable writes to PM1 and PM2 registers).
(5) Write to the WDTS register (watchdog timer starts counting).
Setting the PM22 bit to 1 results in the following conditions
• The on-chip oscillator continues oscillating even if the CM21 bit in the CM2 register is set to "0" (main clock
• The on-chip oscillator starts oscillating, and the on-chip oscillator clock becomes the watchdog timer
• The CM10 bit in the CM1 register is disabled against write. (Writing a 1 has no effect, nor is stop mode entered.)
• The watchdog timer does not stop when in wait mode.
Watchdog timer period =
1
9
C
count source.
1 .
B
or PLL clock) (system clock of count source selected by the CM21 bit is valid)
2 /
0
2
9
1
M
0
Watchdog Timer Start Register
b7
Watchdog Timer Control Register
b7
G
1
r a
0 -
o r
3 .
b6
0
1
u
, 0
1
p
2
b5
0
2
0
b4
0
7
b3
b2
page 90
b1
b0
b0
Watchdog timer count (32768)
The watchdog timer is initialized and starts counting after a write instruction
to this register. The watchdog timer value is always initialized to 7FFF
regardless of whatever value is written.
f o
Bit Symbol
on-chip oscillator clock
(b4-b0)
WDC7
4
(b5)
(b6)
Symbol
WDC
Symbol
WDTS
5
8
Reserved bit
Reserved bit
Prescaler select bit
High-order bits of watchdog timer
Addres s
000F
Bit Name
Address
000E
16
16
Function
Set to 0
Set to 0
0 : Divided by 16
1 : Divided by 128
After Reset
00XXXXXX
After Reset
Undefine d
2
Function
16
RW
RW
RW
WO
RO
RW
RW