M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 476

IC M16C/29 MCU FLASH 96K 80LQFP

M30290FAHP#U5A

Manufacturer Part Number
M30290FAHP#U5A
Description
IC M16C/29 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/29r
Datasheet

Specifications of M30290FAHP#U5A

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 27x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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22.15.14 Definition of Programming/Erasure Times
22.15.15 Flash Memory Version Electrical Characteristics 10,000 E/W cycle products (
Normal: U7, U9; T-ver./V-ver.: U7)
22.15.16 Boot Mode
C
1
9
1 .
B
2 /
"Number of programs and erasure" refers to the number of erasure per block.
If the number of program and erasure is n (n=100 1,000 10,000) each block can be erased n times.
For example, if a 2K byte block A is erased after writing 1 word data 1024 times, each to a different
address, this is counted as one program and erasure. However, data cannot be written to the same
adrress more than once without erasing the block. (Rewrite prohibited)
When Block A or B E/W cycles exceed 100, set the FMR17 bit in the FMR1 register to 1 (1 wait) to select
one wait state per block access for products U7 and U9. When the FMR17 bit is set to 1, one wait state is
inserted per access to Block A or B - regardless of the value of the PM17 bit. Wait state insertion during
access to all other blocks, as well as to internal RAM, is controlled by the PM17 bit - regardless of the
setting of the FMR17 bit.
To use the limited number of erasure efficiently, write to unused address within the block instead of
rewite. Erase block only after all possible address are used. For example, an 8-word program can be
written 128 times before erase becomes necessary.
Maintaining an equal number of erasure between Block A and B will also improve efficiency.
We recommend keeping track of the number of times erasure is used.
An undefined value is sometimes output in the I/O port until the internal power supply becomes stable
when "H" is applied to the CNV
When setting the CNV
When the CNV
0
2
9
1
M
0
G
1
r a
o r
0 -
(1) Apply an "L" signal to the RESET pin and the CNV
(2) Bring V
(3) Apply an "H" signal to the CNV
(4) Apply an "H" signal to the RESET pin.
3 .
1
u
, 0
1
p
2
2
0
0
7
SS
CC
pin is “H” and RESET pin is “L”, P6
page 450
to more than 2.7V, and wait at least 2 msec. (Internal power supply stable waiting time)
SS
pin to "H", the following procedure is required:
f o
4
SS
5
8
pin and "L" is applied to the RESET pin.
____________
____________
SS
pin.
7
pin is connected to the pull-up resister.
SS
_____________
pin.
22. Usage Notes

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