D12350F20IV Renesas Electronics America, D12350F20IV Datasheet - Page 80

IC H8S/2350 MCU 4.5/5.5V 0+K I-T

D12350F20IV

Manufacturer Part Number
D12350F20IV
Description
IC H8S/2350 MCU 4.5/5.5V 0+K I-T
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12350F20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12350F20IV
Manufacturer:
INF
Quantity:
4 834
Section 2 CPU
Note:
Rev. 3.00 Sep 15, 2006 page 44 of 988
REJ09B0330-0300
Type
Arithmetic
operations
* Size refers to the operand size.
B: Byte
W: Word
L:
Longword
Instruction
DIVXS
CMP
NEG
EXTU
EXTS
TAS
Size *
B/W
B/W/L
B/W/L
W/L
W/L
B
Function
Rd ÷ Rs
Performs signed division on data in two general
registers: either 16 bits ÷ 8 bits
remainder or 32 bits ÷ 16 bits
bit remainder.
Rd – Rs, Rd – #IMM
Compares data in a general register with data in another
general register or with immediate data, and sets CCR
bits according to the result.
0 – Rd
Takes the two’s complement (arithmetic complement) of
data in a general register.
Rd (zero extension)
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by padding with zeros on the left.
Rd (sign extension)
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by extending the sign bit.
Tests memory contents, and sets the most significant bit
(bit 7) to 1.
@ERd – 0, 1
Rd
Rd
(<bit 7> of @Erd)
Rd
Rd
16-bit quotient and 16-
8-bit quotient and 8-bit

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