MC9S12XDT256MAA Freescale Semiconductor, MC9S12XDT256MAA Datasheet - Page 1020

IC MCU 256K FLASH 80-QFP

MC9S12XDT256MAA

Manufacturer Part Number
MC9S12XDT256MAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256MAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
16KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Price
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Part Number:
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Chapter 24 DG128 Port Integration Module (S12XDG128PIMV2)
24.0.5.53 Port J Reduced Drive Register (RDRJ)
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each port J output pin as either full or reduced. If the port is
used as input this bit is ignored.
24.0.5.54 Port J Pull Device Enable Register (PERJ)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input or
as wired-OR output. This bit has no effect if the port is used as push-pull output. Out of reset a pull-up
device is enabled.
1022
RDRJ[7:6]
RDRJ[1:0]
Reset
Reset
Field
7–0
W
W
R
R
RDRJ7
PERJ7
Reduced Drive Port J
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
0
1
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
RDRJ6
PERJ6
Figure 24-56. Port J Pull Device Enable Register (PERJ)
0
1
6
6
Figure 24-55. Port J Reduced Drive Register (RDRJ)
Table 24-49. RDRJ Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
0
0
5
5
0
0
0
0
4
4
Description
0
0
0
0
3
3
0
0
0
0
2
2
RDRJ1
Freescale Semiconductor
PERJ1
0
1
1
1
RDRJ0
PERJ0
0
1
0
0

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