MC9S12XDT256MAA Freescale Semiconductor, MC9S12XDT256MAA Datasheet - Page 973

IC MCU 256K FLASH 80-QFP

MC9S12XDT256MAA

Manufacturer Part Number
MC9S12XDT256MAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256MAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
16KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 24
DG128 Port Integration Module (S12XDG128PIMV2)
Introduction
The S12XD family port integration module (below referred to as PIM) establishes the interface between
the peripheral modules including the non-multiplexed external bus interface module (S12X_EBI) and the
I/O pins for all ports. It controls the electrical pin properties as well as the signal prioritization and
multiplexing on shared pins.
This document covers the description of:
Most I/O pins can be configured by register bits to select data direction and drive strength, to enable and
select pull-up or pull-down devices. Interrupts can be enabled on specific pins resulting in status flags.
The I/O’s of 2 MSCAN and 2 SPI modules can be routed from their default location to alternative port
pins.
24.0.1
A full-featured PIM module includes these distinctive registers:
Freescale Semiconductor
Port A, B
Port E associated with the IRQ, XIRQ interrupt inputs
Port K
Port T connected to the Enhanced Capture Timer (ECT) module
Port S associated with 2 SCI and 1 SPI modules
Port M associated with 2 MSCAN modules and 1 SCI module
Port P connected to the PWM and 1 SPI module — inputs can be used as an external interrupt
source
Port H associated with 2 SCI modules — inputs can be used as an external interrupt source
Port J associated with 1 MSCAN, 1 SCI, and 1 IIC module — inputs can be used as an external
interrupt source
Port AD1 associated with one 16-channel ATD module
Features
The implementation of the PIM is device dependent. Therefore some
functions are not available on certain derivatives or80-pin package options.
MC9S12XDP512 Data Sheet, Rev. 2.21
NOTE
975

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